ELECTRONIC DEVICE MANUFACTURING METHOD, SUBSTRATE FOR MOUNTING ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SUBSTRATE

WIPO Patent Application WO/2010/061428

A1

Provided is a manufacturing method by which reliability of an electronic component can be sufficiently evaluated, and reliability of an electronic device wherein such electronic component is bonded on other electronic component through a solder bump can be improved. In the electronic device manufacturing method, a first component and a second component are prepared, a first bump composed of a Bi-based first solder is formed on either the first component or the second component, and a second bump composed of a Sn-based second solder having a liquidus-line temperature substantially the same as that of the first solder is formed on the other one of the first component and the second component. The first bump and the second bump are brought into contact with each other at a temperature higher than the liquidus-line temperature of the first solder and that of the second solder to integrate the first bump and the second bump into a solder bonding section, which is composed of a third solder having liquidus-line temperature lower than that of the first solder and that of the second solder, between the first component and the second component. The solder bonding section is solidified by reducing the temperature of the solder bonding section.

SAKUYAMA SEIKI (JP)
AKAMATSU TOSHIYA (JP)
KOIDE MASATERU (JP)

PCT/JP2008/003534

June 03, 2010

November 28, 2008

Click for automatic bibliography generation  

FUJITSU LTD (JP)
SAKUYAMA SEIKI (JP)
AKAMATSU TOSHIYA (JP)
KOIDE MASATERU (JP)

H01L21/60; H05K3/34

JPS63306634A	1988-12-14
JPH0831835A	1996-02-02
JP2007123354A	2007-05-17
JP2001230537A	2001-08-24

YOKOYAMA, JUNICHI (JP)
Junichi Yokoyama (JP)

View/Download PDF      PDF Help

Previous Patent: ELEVATOR GROUP MANAGEMENT DEVICE

Next Patent: TEMPLE JOINT STRUCTURE OF FRAME OF SPECTACLES