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Title:
ESD PROTECTION CIRCUIT AND SEMICONDUCTOR DEVICE PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2011/108445
Kind Code:
A1
Abstract:
Disclosed is an ESD protection circuit, which has ESD protection functions to the circuits from a low withstand voltage circuit to a high withstand voltage circuit, even with a small layout area. In the ESD protection circuit, an ESD protection element (13) is provided between a node (NL), which is connected to a power supply terminal (VCC_l) that outputs a low voltage, and a grounding line, an ESD protection element (12) is provided between a node (NM), which is connected to a power supply terminal (VCC_m) that outputs an intermediate voltage, and the node (NL), and an ESD protection element (11) is provided between a node (NH), which is connected to a power supply terminal (VCC_h) that outputs a high voltage, and the node (NM). A low withstand voltage element to be protected (18), an intermediate withstand voltage element to be protected (17), and a high withstand voltage element to be protected (16) are respectively connected between a grounding line (VSS) and respective nodes (NL, NM, NH). ESD protection of the element to be protected (16) is performed by means of the ESD protection elements (11, 12, 13), ESD protection of the element to be protected (17) is performed by means of the ESD protection elements (12, 13), and ESD protection of the element to be protected (18) is performed by means of an ESD protection element (13).

Inventors:
FUKUMI MASAYUKI
Application Number:
PCT/JP2011/054238
Publication Date:
September 09, 2011
Filing Date:
February 25, 2011
Export Citation:
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Assignee:
SHARP KK (JP)
FUKUMI MASAYUKI
International Classes:
H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/088
Foreign References:
JP2009503812A2009-01-29
JPH0714984A1995-01-17
JPH07235604A1995-09-05
JPH11103021A1999-04-13
Attorney, Agent or Firm:
MASAKI YOSHIFUMI (JP)
Yoshifumi Masaki (JP)
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Claims: