HIGH-SPEED REGENERATIVE COMPARATOR CIRCUIT

WIPO Patent Application WO/2020/057269

A1

A high-speed regenerative comparator circuit, comprising: a signal input stage connected to an input end for differential signal input; a latch for caching and serving as a differential signal output end; a current source connected to the signal input stage for providing a power supply voltage; a fast path connected to the output end and used for increasing a voltage difference of the output end and turning on a positive feedback network of the latch; and a reset switch, comprising a first reset switch and a second reset switch. According to the present invention, the transmission delay of the regenerative comparator circuit can be greatly reduced; and in a latch phase, a bias voltage is disconnected by means of timing control, and thus the power consumption of a comparator can be reduced. The present invention has the advantages of simple circuit implementation and high reliability.

WO/2016/040958	CIRCUITS AND METHODS FOR DETECTING INTERFERERS
WO/2015/192540	COMPARATOR, DISPLAY SUBSTRATE AND DISPLAY DEVICE
JP4494935	Fixed frequency clock output with variable high frequency input clock and unrelated fixed frequency reference signal

CHEN XI (CN)
SHEN XIAOFENG (CN)
HUANG XINGFA (CN)
LI LIANG (CN)
XU MINGYUAN (CN)
WANG JIAN'AN (CN)
FU DONGBING (CN)
CHEN GUANGBING (CN)

PCT/CN2019/098795

March 26, 2020

August 01, 2019

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NO 24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECH GROUP CORPORATION (CN)

H03K5/22; H03K5/00; H03K17/687

CN109327209A	2019-02-12
CN1260660A	2000-07-19
CN104639167A	2015-05-20
US6292030B1	2001-09-18
CN108494406A	2018-09-04
CN108494388A	2018-09-04

J.Z.M.C. PATENT AND TRADEMARK LAW OFFICE (GENERAL PARTNERSHIP) (CN)

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