Title:
IMAGE CAPTURE ELEMENT AND SEMICONDUCTOR ELEMENT
Document Type and Number:
WIPO Patent Application WO/2020/189534
Kind Code:
A1
Abstract:
An image capture element according to an embodiment of the present disclosure is provided with a first semiconductor substrate, and a second semiconductor substrate stacked on the first semiconductor substrate with an insulating layer therebetween. The first semiconductor substrate includes a photoelectric conversion portion, and a charge holding portion for holding a charge transferred from the photoelectric conversion portion. The second semiconductor substrate includes an amplifying transistor for generating a signal of a voltage corresponding to the level of the charge being held by the charge holding portion. The amplifying transistor has a channel region, a source region, and a drain region in a plane intersecting a surface of the second semiconductor substrate, and includes a gate electrode which is opposite the channel region with a gate insulating film therebetween and is electrically connected to the charge holding portion.
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Inventors:
MIYAKE SHINICHI (JP)
YAMASHITA HIROFUMI (JP)
YAMASHITA HIROFUMI (JP)
Application Number:
PCT/JP2020/010981
Publication Date:
September 24, 2020
Filing Date:
March 13, 2020
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L21/3205; H01L21/336; H01L21/768; H01L21/8234; H01L23/522; H01L27/00; H01L27/088; H01L27/146; H01L29/423; H01L29/49; H01L29/78; H04N5/3745
Domestic Patent References:
| WO2017169884A1 | 2017-10-05 |
Foreign References:
| JP2014022561A | 2014-02-03 | |||
| JP2015162668A | 2015-09-07 | |||
| JP2017027982A | 2017-02-02 | |||
| JP2015032687A | 2015-02-16 | |||
| JP2010245506A | 2010-10-28 | |||
| JP2019048551A | 2019-03-28 |
Other References:
See also references of EP 3940752A4
Attorney, Agent or Firm:
TSUBASA PATENT PROFESSIONAL CORPORATION (JP)
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