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Title:
LAMINATED CERAMIC CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2023/238453
Kind Code:
A1
Abstract:
Provided is a laminated ceramic capacitor capable of reducing ESL. A laminated ceramic capacitor 1 comprises: a first inner electrode layer 31 extending in a length direction L; and a second inner electrode layer 32 extending in a width direction W. The first inner electrode layer 31 has: a region R11 that extends along a lateral portion at a lateral surface WS1 side from an end surface LS1 to a portion of an opposite electrode part; a region R12 that extends along a lateral portion at a lateral surface WS2 side from the end surface LS1 to a portion of the opposite electrode part; a region R13 that extends along a lateral portion at the lateral surface WS1 side from an end surface LS2 to a portion of the opposite electrode part; a region R14 that extends along a lateral portion at the lateral surface WS2 side from the end surface LS2 to a portion of the opposite electrode part; and a region R15 other than the regions R11, R12, R13, and R14. The coverage of the regions R11, R12 is higher than that of the region R15, and/or the coverage of the regions R13, R14 is higher than that of the region R15.

Inventors:
NISHIBAYASHI KAZUHIRO (JP)
Application Number:
PCT/JP2023/006022
Publication Date:
December 14, 2023
Filing Date:
February 20, 2023
Export Citation:
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Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/30; H01G4/35
Foreign References:
JP2006100682A2006-04-13
JP2015053512A2015-03-19
JP2008085041A2008-04-10
JP2013041886A2013-02-28
Attorney, Agent or Firm:
KATO Ryuta et al. (JP)
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