Title:
LAYOUT OF DRIVING CIRCUIT, SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR MEMORY
Document Type and Number:
WIPO Patent Application WO/2023/029228
Kind Code:
A1
Abstract:
Embodiments of the present disclosure provide a layout of a driving circuit, a semiconductor structure and a semiconductor memory, the layout comprising: a P-type transistor, an N-type transistor and four test modules, the four test modules being distributed on both sides of the P-type transistor and the N-type transistor and are have an up-down symmetrical structure, and the P-type transistor and the N-type transistor have an up-down structural distribution in the middle of the four test modules.
Inventors:
SUN HUIJUAN (CN)
LEE JIHOON (CN)
LEE JIHOON (CN)
Application Number:
PCT/CN2021/131909
Publication Date:
March 09, 2023
Filing Date:
November 19, 2021
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G09G3/00; G11C29/00; H01L21/66; H01L23/50; H01L27/02
Foreign References:
| CN109903712A | 2019-06-18 | |||
| CN101252292A | 2008-08-27 | |||
| US20100201376A1 | 2010-08-12 | |||
| US20160086863A1 | 2016-03-24 | |||
| US6823485B1 | 2004-11-23 | |||
| CN1581358A | 2005-02-16 |
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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