MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE STRUCTURES AND METHODS FOR FABRICATING THE SAME

Title:

MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE STRUCTURES AND METHODS FOR FABRICATING THE SAME

Document Type and Number:

WIPO Patent Application WO2006049780

Kind Code:

A8

Abstract:

Magnetoelectric memory element structures and methods for making such structures using a barrier layer as a material removal stop layer are provided. The methods comprise forming a digit line (26) disposed at least partially within a dielectric layer (24). The dielectic material layer overlies an interconnect stack. A conductive barrier layer (40, 42) having a first portion (40) and a second portion (42) id deposited. The first portion overlies the digit line and the second portion is disposed within the void space and in electrical communication with the interconnect stack. A memory element layer (46) is formed overlying the first portion and an electrode layer (48) is deposited overlying the memory element layer. The electrode layer and the memory element layer are then patterned and etched.

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Inventors:

LIEN MITCHELL T (US)
DURLAM MARK A (US)
MEIXNER THOMAS V (US)
WISE LOREN J (US)

Application Number:

PCT/US2005/035466

Publication Date:

April 26, 2007

Filing Date:

September 30, 2005

Export Citation:

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Assignee:

FREESCALE SEMICONDUCTOR INC (US)
LIEN MITCHELL T (US)
DURLAM MARK A (US)
MEIXNER THOMAS V (US)
WISE LOREN J (US)

International Classes:

H01L21/00

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