Title:
MEMORY AND ACCESS METHOD
Document Type and Number:
WIPO Patent Application WO/2024/001574
Kind Code:
A1
Abstract:
Provided in the embodiments of the present application is a memory. The memory comprises: a first storage unit, a sensitive amplifier, a first bit line, a second bit line, a first isolator, a second isolator, a third isolator, a fourth isolator and a controller. The first bit line is connected to the first storage unit and a first output of the sensitive amplifier, and the second bit line is connected to a second output of the sensitive amplifier; the first isolator is connected to the first bit line and the first output of the sensitive amplifier, and the second isolator is connected to the second bit line and the second output of the sensitive amplifier; the third isolator is connected to the first bit line and the second output of the sensitive amplifier, and the fourth isolator is connected to the second bit line and the first output of the sensitive amplifier. The technical scheme of the present application can convert a single-sided disturbance during a whole access cycle of a storage unit into a double-sided disturbance, reducing the impact of the single-sided disturbance on a capacitor.
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Inventors:
XU LIANG (CN)
BU SITONG (CN)
FANG YICHEN (CN)
XU JEFFREY JUNHAO (CN)
BU SITONG (CN)
FANG YICHEN (CN)
XU JEFFREY JUNHAO (CN)
Application Number:
PCT/CN2023/094138
Publication Date:
January 04, 2024
Filing Date:
May 15, 2023
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G11C11/22
Foreign References:
US6091625A | 2000-07-18 | |||
CN101266832A | 2008-09-17 | |||
CN114342075A | 2022-04-12 | |||
US20030206431A1 | 2003-11-06 | |||
US20200075065A1 | 2020-03-05 |
Attorney, Agent or Firm:
LONGSUN LEAD IP LTD. (CN)
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