Title:
METHOD FOR INCREASING PRECISION OF FLAT EDGE OF SEMICONDUCTOR WAFER, AND LASER CHIP
Document Type and Number:
WIPO Patent Application WO/2022/057735
Kind Code:
A1
Abstract:
Disclosed in the present application are a method for increasing the precision of a flat edge of a semiconductor wafer, and a laser chip. The method comprises: cleaving an obtained epitaxial wafer to obtain at least one cleavage edge; measuring the angle between each cleavage edge and a corresponding lithographic line on the epitaxial wafer to obtain a deflection angle; repeating the described steps a plurality of times to obtain a plurality of deflection angles; and using the plurality of deflection angles to calculate a compensation angle and cleaving another epitaxial wafer according to the compensation angle so that a cleavage edge corresponding to the other epitaxial wafer is parallel to a flat edge and/or lithographic line corresponding to another epitaxial wafer. By means of the described method, the present application can improve the yield of a laser chip.
Inventors:
AI JIARUI (CN)
DING XINQI (CN)
CHENG CHAO-CHEN (CN)
WANG JU (CN)
LIAO GUIBO (CN)
JIAO WANG (CN)
WU YANGFENG (CN)
DING XINQI (CN)
CHENG CHAO-CHEN (CN)
WANG JU (CN)
LIAO GUIBO (CN)
JIAO WANG (CN)
WU YANGFENG (CN)
Application Number:
PCT/CN2021/117639
Publication Date:
March 24, 2022
Filing Date:
September 10, 2021
Export Citation:
Assignee:
SHENZHEN LIGHTING INST (CN)
International Classes:
H01S5/02; G03F9/00
Foreign References:
| CN106444307A | 2017-02-22 | |||
| CN106292176A | 2017-01-04 | |||
| CN105390935A | 2016-03-09 | |||
| CN110048291A | 2019-07-23 | |||
| JPS59200437A | 1984-11-13 |
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