Title:
METHOD FOR MANUFACTURING ARRAY SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2018/119652
Kind Code:
A1
Abstract:
A method for manufacturing an array substrate, comprising: forming a circuit thin film transistor (11) and a pixel thin film transistor (12) on a substrate (10); forming an insulating layer (13) covering the circuit thin film transistor (11) and the pixel thin film transistor (12) and a flat layer (14) covering the insulating layer (13); patterning the flat layer (14) by means of a halftone mask (20) having a semi-transparent film, and forming a pixel definition region (141) and a hole definition region (142) on the flat layer (14); etching the hole definition region (142) to form a via hole (143) communicated with one of a source electrode (123) and a drain electrode (124) of the pixel thin film transistor (12); forming, on the pixel definition region (141), a pixel electrode (15) electrically connected to one of the source electrode (123) and the drain electrode (124) of the pixel thin film transistor (12); and forming a support layer (17) on the flat layer (14).
Inventors:
HONG RI (CN)
Application Number:
PCT/CN2016/112346
Publication Date:
July 05, 2018
Filing Date:
December 27, 2016
Export Citation:
Assignee:
SHENZHEN ROYOLE TECHNOLOGIES CO LTD (CN)
International Classes:
H01L21/77; H01L27/12; G02F1/1368
Foreign References:
| CN101556417A | 2009-10-14 | |||
| US20090085040A1 | 2009-04-02 | |||
| CN102543867A | 2012-07-04 | |||
| KR20040060598A | 2004-07-06 | |||
| CN105068373A | 2015-11-18 |
Attorney, Agent or Firm:
SCIHEAD IP LAW FIRM (CN)
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