Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/000726
Kind Code:
A1
Abstract:
Embodiments of the present invention relate to a method for manufacturing a semiconductor structure, comprising: providing a structure to be etched; forming an etching hole in said structure; and performing multiple depositions on a conductive material layer until the conductive material layer is void-free and fully fills the etching hole, wherein after at least some of the depositions on the conductive material layer, the deposited conductive material layer is annealed. According to the method for manufacturing a semiconductor structure, when a conductive material layer is deposited to fill an etching hole, the etching hole is fully filled by performing multiple depositions on the conductive material layer instead of one deposition process, and after at least some of the depositions on the conductive material layer, the deposited conductive material layer is annealed, so that the conductive material layer is void-free and fully fills the etching hole.
Inventors:
LIU YOUMING (CN)
Application Number:
PCT/CN2022/109571
Publication Date:
January 04, 2024
Filing Date:
August 02, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/768
Foreign References:
| CN103377907A | 2013-10-30 | |||
| CN114678325A | 2022-06-28 | |||
| US20060003523A1 | 2006-01-05 | |||
| CN1581451A | 2005-02-16 | |||
| CN112053945A | 2020-12-08 | |||
| US7026211B1 | 2006-04-11 |
Other References:
See also references of EP 4322203A4
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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