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Title:
METHOD FOR MANUFACTURING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/129237
Kind Code:
A1
Abstract:
A mask material layer 7 is formed on a semiconductor layer 6. A belt-like mask material layer 8a is formed which has, on a top portion, a belt-like mask material layer 9a that has the same planer shape. Belt-like mask material layers 12aa, 12ab are formed which contact the belt-like mask material layers 7, 8a on both sides thereof and have, on top portions, belt-like mask material layers 15a, 15b which have the same planer shapes. Belt-like mask material layers 16a, 16b are formed which contact the belt-like mask material layers 12aa, 12ab, 15a, 15b on both outer sides thereof and have, on top portions, belt-like mask material layers 17a, 17b which have the same planer shapes. An orthogonal belt-like mask material layer is formed above the belt-like mask material layer 9a in a direction orthogonal to the direction of extension of the belt-like mask material layer 9a in planar view. A semiconductor pillar is formed in a region in which the orthogonal belt-like mask material layer overlaps the belt-like mask material layers 8a, 16a, 16b by etching the semiconductor layer 6. A pillar-like semiconductor device in which the semiconductor pillar has been formed into a channel is thus formed.

Inventors:
MASUOKA FUJIO (JP)
HARADA NOZOMU (JP)
LI YISUO (SG)
Application Number:
PCT/JP2018/047245
Publication Date:
June 25, 2020
Filing Date:
December 21, 2018
Export Citation:
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Assignee:
UNISANTIS ELECT SINGAPORE PTE (SG)
MASUOKA FUJIO (JP)
HARADA NOZOMU (JP)
LI YISUO (SG)
International Classes:
H01L21/336; H01L21/8234; H01L21/8238; H01L21/8244; H01L27/088; H01L27/092; H01L27/11; H01L29/78
Domestic Patent References:
WO2018070034A12018-04-19
WO2015129021A12015-09-03
WO2015125291A12015-08-27
WO2015075819A12015-05-28
WO2015071983A12015-05-21
WO2015022744A12015-02-19
Foreign References:
JP2015138908A2015-07-30
Attorney, Agent or Firm:
TANAKA Shinichiro et al. (JP)
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