Title:
MULTILAYER CERAMIC CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2023/243159
Kind Code:
A1
Abstract:
Provided is a multilayer ceramic capacitor able to inhibit electric field concentration. Provided is a multilayer ceramic capacitor comprising a laminate 10 which has a plurality of dielectric layers 20 and a plurality of internal electrode layers 30, and first and second external electrodes 40A, 40B, wherein: the plurality of internal electrode layers 30 include a plurality of first and second internal electrode layers 31, 32 which are electrically connected to the first and second external electrodes 40A, 40B, respectively; the first and second internal electrode layers 31, 32 each have a plurality of holes H having different area equivalent diameters; and, where an area equivalent diameter D99 is the area equivalent diameter at which a cumulative value in a cumulative distribution of the area equivalent diameters of the plurality of holes H is 99% and a thickness t is the thickness of each of the dielectric layers 20 interposed between a first and second internal electrode layer 31, 32, the thickness t of each of the dielectric layers 20 is at least 0.5 µm, and mathematical expression (1) is satisfied. (1) (area equivalent diameter D99)<0.0879×exp(2.86×t)...
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Inventors:
HIRAI TOMOAKI (JP)
Application Number:
PCT/JP2023/008534
Publication Date:
December 21, 2023
Filing Date:
March 07, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/30
Foreign References:
JP2002075771A | 2002-03-15 | |||
JP2013030753A | 2013-02-07 | |||
JP2019114753A | 2019-07-11 |
Attorney, Agent or Firm:
KATO Ryuta et al. (JP)
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