N-BIT SUM-CARRY ACCUMULATOR

WIPO Patent Application WO1988005189

A1

The shortcomings illustrated by the related art are addressed by the improved accumulator (110) of the present invention. The invention provides a periodic output signal in response to an input frequency word and includes one adder (112) for each bit of the frequency word to be added. Each adder (112) has first and second inputs (A and B), a sum output representing the sum of the first and second inputs, and a carry output (Co) representing the sum of the first and second inputs. All but the first adder (112) includes a carry input (Ci). A first sum register (114) is included for storing the sum outputs of said adders (112). The inputs of said register (114) being the sum outputs of said adders (112) and the outputs of the register (114) the second inputs of said adders (112). The invention includes a second carry register (115) for storing the carry outputs (Co) of said adders (112). The output of said second register (115) being the carry inputs (Ci) of said adders (112).

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SHAHRIARY IRADJ (US)
REINHARDT VICTOR S (US)

PCT/US1987/003291

July 14, 1988

December 07, 1987

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HUGHES AIRCRAFT CO (US)

G06F3/12; G06F7/50; B41J5/30; G06F7/506; G06F7/508; G06F7/509; G06F7/68; G06F17/10; G06K15/00; (IPC1-7): G06F7/50; G06F7/68

EP0168997A2	1986-01-22
DE1549552A1	1971-03-04

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