CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Patent Application No. 62/755,659, filed on November 5, 2018, entitled“GROWTH OF CLOSELY- PACKED NON-POLAR GaN ON INDIUM TIN OXIDE INTERLAYER AND

OVERGROWN PLANAR GaN LAYER TEMPLATE ON AMORPHOUS GLASS SUBSTRATE,” the disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND

TECHNICAL FIELD

[0002] Embodiments of the disclosed subject matter generally relate to optoelectronic semiconductor devices having improved quantum efficiency.

DISCUSSION OF THE BACKGROUND

[0003] Optoelectronic semiconductor devices, such as light-emitting devices, are finding increased usage across a wide variety of applications. For example, light-emitting diodes are now used in place of incandescent light sources in light bulbs, displays, and the like. Group-Ill nitride-based materials are widely used in light-emitting optoelectronic devices due to their ability to produce ultraviolet, visible, and near-infrared light. [0004] Conventionally, group-ill nitride-based materials are arranged in a c-plane (0001) orientation in light-emitting optoelectronic semiconductor devices due to the ease of production of these materials in the c-plane orientation. One problem with the c-plane orientation is that the internal piezoelectric polarization field inherent in group-ill nitride-based materials causes the quantum confined Stark effect (QCSE), which reduces the overlap between the wavefunctions of electrons and holes in the device active region. This reduces quantum efficiency at longer emission wavelengths, and thus these devices are not efficient at converting electricity into light.

[0005] It has been recognized that the internal piezoelectric polarization field inherent in group-ill nitride-based materials can be eliminated by growing Ill-nitride materials in a direction perpendicular to the c-plane, which for gallium nitride (GaN) and aluminum nitride (AIN) single crystal substrates is either the a- or m-plane. Conventional techniques for achieving an a- or m-plane orientation are extremely costly and limited to small substrate sizes.

[0006] For example, Reference 1 discloses growing GaN nanowires on a sapphire substrate using nickel (Ni) catalysts and then forming a GaN film on the GaN nanowires. This requires the use of r-plane sapphire to grow the nonpolar a-plane GaN film. Supplies of r-plane sapphire substrates are limited due the expense in producing these substrates. Further, r-plane sapphire substrates do not provide the required electrical conductivity to the a-plane GaN film, and thus require a number of micrometer thick n-GaN layers to be grown to achieve the required electrical conductivity. Further, this only allows for implementing a lateral current-injection geometry in an optoelectronic device, which can cause a current crowding effect near the metal contact layer on the n-GaN layer, and thus generates heat and degrades device efficiency.

[0007] Thus, there is a need for an optoelectronic semiconductor device that can be produced cost-efficiently while having an improved quantum efficiency compared to conventional devices using c-plane orientation of Ill-nitride materials.

SUMMARY

[0008] According to an embodiment, there is a method of forming an optoelectronic semiconductor device. An amorphous substrate is provided, and a transparent and conductive oxide layer is deposited on the amorphous substrate.

The transparent and conductive oxide layer is annealed to form an annealed transparent and conductive oxide layer having a cubic-oriented and/or

rhombohedral-oriented surface. A nanorod array is formed on the cubic-oriented and/or rhombohedral-oriented surface of the annealed transparent and conductive oxide layer. The annealing of the transparent conductive oxide layer and the formation of the nanorod array are performed using molecular beam epitaxy (MBE). The nanorods of the nanorod array comprise a group-ill material and are non-polar.

[0009] According to another embodiment, there is an optoelectronic semiconductor device, which includes an amorphous substrate, a transparent and conductive oxide layer having a cubic-oriented and/or rhombohedral-oriented surface and arranged on the amorphous substrate, and a nanorod array arranged on the cubic-oriented and/or rhombohedral-oriented surface of the transparent and conductive oxide layer. The nanorods of the nanorod array comprise a group-ill material and are non-polar.

[0010] According to a further embodiment, there is an optoelectronic semiconductor system, which includes a voltage source and an array of

optoelectronic semiconductor devices coupled to the voltage source. Each of optoelectronic semiconductor devices includes an amorphous substrate, a transparent and conductive oxide layer having a cubic-oriented and/or

rhombohedral-oriented surface and arranged on the amorphous substrate, and a nanorod array arranged on the cubic-oriented and/or rhombohedral-oriented surface of the transparent and conductive oxide layer. The nanorods of the nanorod array comprise a group-ill material and are non-polar.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate one or more embodiments and, together with the description, explain these embodiments. In the drawings:

[0012] Figure 1 is a flowchart of a method of forming an optoelectronic semiconductor device according to embodiments;

[0013] Figures 2A-2D are schematic diagrams of a method of forming an optoelectronic semiconductor device according to embodiments;

[0014] Figures 3A and 3B are schematic diagrams of optoelectronic semiconductor devices according to embodiments;

[0015] Figure 4 is a high-resolution transmission electron microscopy (HR-TEM) image of an optoelectronic semiconductor device according to embodiments; and

[0016] Figure 5 is a schematic diagram of an optoelectronic semiconductor system according to embodiments.

DETAILED DESCRIPTION

[0017] The following description of the exemplary embodiments refers to the accompanying drawings. The same reference numbers in different drawings identify the same or similar elements. The following detailed description does not limit the invention. Instead, the scope of the invention is defined by the appended claims. The following embodiments are discussed, for simplicity, with regard to the terminology and structure of optoelectronic semiconductor devices.

[0018] Reference throughout the specification to“one embodiment” or“an embodiment” means that a particular feature, structure or characteristic described in connection with an embodiment is included in at least one embodiment of the subject matter disclosed. Thus, the appearance of the phrases“in one embodiment” or“in an embodiment” in various places throughout the specification is not necessarily referring to the same embodiment. Further, the particular features, structures or characteristics may be combined in any suitable manner in one or more embodiments.

[0019] Figure 1 is a flowchart of a method of forming an optoelectronic semiconductor device according to embodiments, which will be described in connection with the schematic diagrams of Figures 2A-2D. Initially, an amorphous substrate 205 is provided (step 105). A transparent and conductive oxide layer is deposited on the amorphous substrate 205 (step 110). The transparent and conductive oxide layer is annealed to form an annealed transparent and conductive oxide layer 210 having a cubic-oriented and/or rhombohedral-oriented surface (step 115). A nanorod array 215 is formed on the cubic-oriented and/or rhombohedral-oriented surface of the annealed transparent and conductive oxide layer 210 (step 120). The annealing (step 115) of the transparent and conductive oxide layer 210 and the formation (step 120) of the nanorod array are performed using molecular beam epitaxy (MBE). The nanorods of the nanorod array 215 comprise a group-ill material and are non-polar. The nanorods of the nanorod array 215 can achieve the non-polarity by having an a-plane or m-plane orientation. The transparent and conductive oxide layer provides for a vertical current-injection geometry allowing uniform current flow along the vertical direction of the device (i.e., from top to bottom), which improves device efficiency compared to the lateral current-injection geometry of devices employing r-plane sapphire substrates.

[0020] The deposited transparent and conductive oxide layer 210 includes coalescent columnar grains formed as a planar layer and the molecular beam epitaxy annealing improves the crystallinity of, and increases the grain size within, an upper portion of the transparent and conductive oxide layer 210 so as to enhance the formation of the cubic-oriented and/or rhombohedral-oriented surface that is favorable for subsequent formation of the a-plane nanorod array 215. The molecular beam epitaxy also accommodates the selective area growth (SAG) required to form the nanorods of the nanorod array 215. The transparent and conductive oxide layer 210 can be any type of transparent and conductive oxide layer, which after annealing, exhibits the cubic-oriented and/or rhombohedral-oriented surface. This layer 210 can comprise, for example, tin-doped indium oxide, ITO, or fluorine-doped tine oxide, FTO. Due to the cubic-oriented and/or rhombohedral-oriented surface of the transparent and conductive oxide layer 210, the nanorod array comprised of a group-ill material formed on the layer 210 exhibit an a-plane or m-plane orientation during growth. Specifically, the stacking orders of the group-ill material of the nanorods follow the atomic sequence of the underlying transparent and conductive oxide layer 210 and the group-ill material has its growth direction as non-polar, i.e., a-plane or m-plane. This a-plane or m-plane orientation results in minimal or no strain between the nanorods of the nanorod array 215 and the transparent and conductive oxide layer 210 (i.e., the nanorods of the nanorod array 215 are non-polar), which addresses the quantum confined Stark effect issues when the nanorods have the conventional c-plane orientation. Further, the a-plane or m-plane orientation allows for an increased volume of the quantum well to 6-8 nm while maintaining an optimal spatial overlap of the electron- and

hole-wavefunctions so long as the quantum confinement effect and the

lattice-mismatch between a quantum well and quantum barrier are maintained. In contrast, with a conventional c-plane orientation the quantum well volume is typically limited to 2-3 nm in order to achieve the necessary spatial overlap of electron- and hole-wave functions required for high efficiency devices. The increased volume of the quantum well further increases the efficiency of the device.

[0021] The transparent and conductive oxide layer 210 can be deposited using physical vapor deposition, e-beam evaporation, sputter deposition, and the like.

Moreover, in an embodiment, the transparent and conductive oxide layer 210 can be annealed prior to the annealing using molecular beam epitaxy. This can involve, for example, rapid thermal annealing (RTA) in an oxygen-depleted or vacuum environment or an argon ambient.

[0022] An optoelectronic semiconductor device formed by steps 105-120 of Figure 1 is illustrated in Figure 3A. As illustrated, the device 300A includes an amorphous substrate 205 and a transparent and conductive oxide layer 210 having a cubic-oriented and/or rhombohedral-oriented surface and arranged on the amorphous substrate 205. The amorphous substrate 205 can be any type of transparent amorphous substrate such as, for example, an amorphous glass substrate comprising fused silica or quartz. The transparent and conductive oxide layer 210 acts as a pre-orienting layer for forming the non-polar (i.e., a-plane or m-plane orientated) nanorod array and the layer of group-ill material (if employed) and also provide the necessary conductivity for the device.

[0023] A nanorod array 215 is arranged on the cubic-oriented and/or rhombohedral-oriented surface of the transparent and conductive oxide layer 210. Nanorods of the nanorod array 215 comprise a group-ill material and are non-polar.

The non-polarity can be achieved by the nanorods having an a-plane or m-plane orientation. The group-ill material of the nanorod array 215 can be a group-ill nitride or group-ill oxide, including ternary and quaternary compositions. It will be recognized that due to cost and availability issues, non-polar aluminum nitrides, gallium nitrides, and indium nitride materials are particularly advantageous.

[0024] Each of the nanorods in the nanorod array 215 can be, for example, nanorod crystals having a micron- or sub-micron (i.e., 0.1-1 pm) diameter and non-polar group-ill materials with an a-plane or m-plane orientation. The nanorod array 215 can be grown in a randomly distributed manner or a dielectric mask can be employed so that the nanorod array 215 is a well-aligned array. Forming the nanorod array 215 so that it is a well-aligned array can involve, for example, forming a mask layer on the annealed transparent and conductive oxide layer 210 prior to forming the nanorod array 215 and removing the mask layer after forming the nanorod array 215. The nanorods of the well-aligned nanorod array 215 can be individually addressable micro- or sub-micron-sized non-polar light-emitting diodes, which can be used, for example, in high-density augmented displayed devices. Thus, the device formed so far can be referred to as a light-emitting optoelectronic device.

[0025] Returning to Figures 1 and 2D, the optoelectronic semiconductor device can also be designed as a large-area light-emitting diode in the form of a continuous layer. Specifically, a layer of non-planar, a-plane or m-plane group-ill material 220 can be formed on the nanorod array 215 (step 125). The formation of the layer of group-ill material 220 can employ a molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), liquid phase epitaxy (LPE), hydride vapor phase epitaxy (HVPE) sublimation, or plasma-enhanced chemical vapor deposition (PECVD) process.

[0026] This step is an optional step and can be omitted if the device illustrated in Figure 3A is desired. The resulting device is illustrated in Figure 3B, which shows the layer of group-ill material 220 formed on the nanorod array 215. Because the nanorods of the nanorod array 215 are formed having an a-plane or m-plane orientation, the layer of group-ill material 220 will also exhibit an a-plane or m-plane orientation, respectively. The device resulting from the additional layer of group-ill material 220 can be an optoelectronic light-emitting device, such as a light-emitting diode or laser diode, an optoelectronic modulator, optoelectronic photodetector, optoelectronic solar and photovoltaic cell, part of a micro-LED display, used for photoelectrochemical watersplitting, an optical amplifier, nano-laser, etc. [0027] Figure 4 is a high-resolution transmission electron microscopy

(HR-TEM) image of an optoelectronic semiconductor device formed using the method described above according to embodiments. The vertical arrow illustrates the growth direction. As illustrated, the lower portion 405 comprises the transparent and conductive substrate, which in the illustrated example is tin-doped indium oxide. The annealing causes an upper portion 410 of the transparent and conductive substrate to form a partially amorphous crystalline layer on which Ill-nitride nanorod array 415 is grown, which in the illustrated example is a gallium nitride nanorod array with a-plane oriented along the growth direction, which is realized using non-polar group-ill materials. Testing of the sample illustrated in Figure 4 revealed that the gallium nitride material had a high crystalline quality. Further, there was an absence of stacking faults in the sample, demonstrating that the non-polar group-ill material was defect- free.

[0028] In addition to employing individual optoelectronic semiconductor devices formed in the manner described above, a number of such devices can be employed together to form an optoelectronic semiconductor system, an example of which is illustrated in Figure 5. The system includes a voltage source 505 electrically coupled (the electrical connection is not illustrated so as to not obscure other elements in the figure) to an array of optoelectronic semiconductor devices 510, which in the illustrated example includes devices 515i-515 _X . Each of the

optoelectronic semiconductor devices 515i-515 _X comprises an amorphous substrate 205, a transparent and conductive oxide layer 210 having a cubic-oriented and/or rhombohedral-oriented surface and arranged on the amorphous substrate 205, and a nanorod array 215 arranged on the cubic-oriented and/or rhombohedral-oriented surface the transparent and conductive oxide layer 210. The nanorods of the nanorod array 215 comprise a group-ill material and are non-polar. The non-polarity can be achieved by the nanorods having an a-plane or m-plane orientation.

Additionally, if desired, each of optoelectronic semiconductor devices 515i-515x comprises a layer of group-ill material arranged on the nanorod array 215. The layer of group-ill material is non-polar (i.e. , it has an a-plane or m-plane orientation).

Although Figure 5 illustrates an array of sixteen optoelectronic semiconductor devices, the array can have more or fewer optoelectronic semiconductor devices depending upon the application in which the system is employed.

[0029] As will be appreciated from the discussion above, the annealing of the transparent and conductive oxide layer provides a cubic-oriented and/or

rhombohedral-oriented surface (exhibiting high crystallinity) so that the subsequent growth of the nanorod array comprising group-ill materials, as well as the layer of group-ill material grown on the nanorod array (if employed), is non-polar due to an a-plane or m-plane growth orientation. This results in the nanorods and the layer of group-ill material grown on the nanorod array (if employed) being non-polar, which increases the device efficiency. Specifically, the a-plane or m-plane orientation increases the volume of the quantum well, which increases power output.

[0030] The discussion above uses the term nanorod. However, it should be appreciated that all references herein to a nanorod also refer to nanowires. Those skilled in the art appreciate that there are various definitions of the terms nanorods and nanowires and that some of these definitions are overlapping. Accordingly, equating the terms nanorods and nanowires herein is not contrary to conventional use of these terms because of the differing definitions currently employed by persons skilled in the art.

[0031] The disclosed embodiments provide optoelectronic semiconductor devices and methods for forming such devices. It should be understood that this description is not intended to limit the invention. On the contrary, the exemplary embodiments are intended to cover alternatives, modifications and equivalents, which are included in the spirit and scope of the invention as defined by the appended claims. Further, in the detailed description of the exemplary

embodiments, numerous specific details are set forth in order to provide a comprehensive understanding of the claimed invention. However, one skilled in the art would understand that various embodiments may be practiced without such specific details.

[0032] Although the features and elements of the present exemplary embodiments are described in the embodiments in particular combinations, each feature or element can be used alone without the other features and elements of the embodiments or in various combinations with or without other features and elements disclosed herein.

[0033] This written description uses examples of the subject matter disclosed to enable any person skilled in the art to practice the same, including making and using any devices or systems and performing any incorporated methods. The patentable scope of the subject matter is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims.

References:

[0034] Reference 1 : Q. Li, Y. Lin, J. R. Creighton, J. J. Figiel, and G. T. Wang, “Nanowire-templated lateral epitaxial growth of low-dislocation density nonpolar a-plane GaN on r-plane sapphire”, Advanced Materials 21 2416-2421 (2009).