Title:
PACKAGING METHOD OF ELECTRONIC COMPONENT, REMOVING METHOD AND DEVICES THEREFOR
Document Type and Number:
WIPO Patent Application WO/2004/107432
Kind Code:
A1
Abstract:
A packaging method of an electronic component employing solder bumps in which thermal stress is controlled for the board, a removing method and devices therefore. The packaging method of an electronic component (bare chip (32)) being soldered to a board (36) by means of solder bumps (114), the removing method and devices therefore, arranged such that the electronic component is moved and contact of the solder bumps with the board or contact of a tool (chuck part (38)) with the electronic component is detected, heating temperature of the electronic component and the board is raised with the contact as an origin, and when a maximum heating temperature HTm is reached, the electronic component is moved in accordance with the temperature rise from the position where the maximum heating temperature HTm is reached to the packaging height of the board.
Inventors:
SATO TOSHIHISA (JP)
Application Number:
PCT/JP2003/006748
Publication Date:
December 09, 2004
Filing Date:
May 29, 2003
Export Citation:
Assignee:
FUJITSU LTD (JP)
SATO TOSHIHISA (JP)
SATO TOSHIHISA (JP)
International Classes:
B23K1/018; B23K3/06; H05K3/34; (IPC1-7): H01L21/60; B23K3/00; H05K3/34
Foreign References:
| JPH08130231A | 1996-05-21 | |||
| JPH05335377A | 1993-12-17 | |||
| JP2003031619A | 2003-01-31 |
Attorney, Agent or Firm:
Unemoto, Shoichi (29-9 Amanuma 3-chom, Suginami-ku Tokyo, JP)
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