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Patent Searching and Data


Title:
PRODUCTION METHOD AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/181460
Kind Code:
A1
Abstract:
A method for producing a semiconductor device (1), said method involving: a step for forming a first groove (71) of a depth H in a semiconductor layer (40); a step for filling the first groove (71) with an oxide film, and forming a surface oxide film (34) of a thickness a on the top surface of the semiconductor layer (40) so as to be the same height as is the oxide film; a step for forming a second groove (72) of a depth h which is deeper than is a from the uppermost surface of a third oxide film (7); a step for forming a gate trench (17) which is deeper than is the depth H in the semiconductor layer (40); a step for depositing polysilicon until at least the gate trench (17) and the second groove (72) are filled with polysilicon; a step for forming a peripheral element (51) by injecting impurities into the polysilicon which was deposited in the second groove (72); and a step for causing the thickness of the peripheral element (51) to match the depth h by removing the polysilicon deposited in the gate trench (17) and the polysilicon deposited in the second groove (72) in parallel until the heights thereof match.

Inventors:
TSUTSUMIDA KAZUMI
JOKYU KATSUYOSHI
MURAYAMA KEIICHI
Application Number:
PCT/JP2022/035855
Publication Date:
September 28, 2023
Filing Date:
September 27, 2022
Export Citation:
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Assignee:
NUVOTON TECH CORPORATION JAPAN (JP)
International Classes:
H01L29/78; H01L21/329; H01L21/336; H01L29/866
Domestic Patent References:
WO2018123799A12018-07-05
Foreign References:
JP2018098476A2018-06-21
US20200135713A12020-04-30
JP2016178197A2016-10-06
CN108389858A2018-08-10
US20130075810A12013-03-28
Attorney, Agent or Firm:
NII, Hiromori et al. (JP)
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