PULSE SHIFTING CIRCUIT AND FREQUENCY SYNTHESIZER

WIPO Patent Application WO/2017/154126

A1

A conventional distortion pulse shifting circuit has a problem that an output timing of a pulse signal cannot be controlled without use of a reset signal. A pulse shifting circuit according to the present invention is provided with: an integrator that integrates an input first signal at clock cycles; a quantizer to which a second signal is input and that outputs a pulse signal when an integrated value of the integrator is equal to a signal value of the second signal or exceeds the signal value of the second signal; a delay circuit that delays the pulse signal; a converter that is provided at a preceding stage or a subsequent stage of the delay circuit and that converts a signal value of the pulse signal to a signal value of the second signal; a subtractor that subtracts the signal value of the pulse signal converted by the converter from a signal value of the first signal input to the integrator; and an input signal control circuit to which a third signal is input, that is arranged in a preceding stage with respect to the integrator, and that adds a signal value corresponding to the third signal to the first signal input to the integrator or blocks the first signal from being input to the integrator for a number of clocks corresponding to the third signal.

NAKAMIZO HIDEYUKI (JP)
HIEDA MORISHIGE (JP)
MIZUTANI HIROYUKI (JP)

PCT/JP2016/057291

September 14, 2017

March 09, 2016

Click for automatic bibliography generation  

MITSUBISHI ELECTRIC CORP (JP)

H03L7/197; H03L7/23

WO2007091516A1

2007-08-16

US20150263742A1	2015-09-17
JP2014049808A	2014-03-17

INABA, Tadahiko et al. (JP)

View/Download PDF      PDF Help

Previous Patent: SYNTHETIC-APERTURE-RADAR SIGNAL PROCESSING DEVICE

Next Patent: STORAGE DEVICE PERFORMANCE MANAGEMENT METHOD AND DEVICE