Title:
SEMICONDUCTOR APPARATUS, ELECTRONIC DEVICE, AND SEMICONDUCTOR CHIP
Document Type and Number:
WIPO Patent Application WO/2023/189010
Kind Code:
A1
Abstract:
The present invention suppresses the occurrence of voids. The present invention comprises a base member that has a first joining surface and a semiconductor chip that has a square second joining surface, wherein the second joining surface of the semiconductor chip and the first joining surface of the base member are directly joined to each other, the semiconductor chip has a dummy pad that is disposed toward a side of the second joining surface, and in the dummy pad, the thickness of a first end part that is positioned toward the side of the second joining surface is less than the thickness of a second end part that is positioned on the opposite side from the first end part.
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Inventors:
NAKAMURA YUTA (JP)
Application Number:
PCT/JP2023/006104
Publication Date:
October 05, 2023
Filing Date:
February 21, 2023
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L25/07; H01L21/02; H01L21/3205; H01L21/768; H01L23/522; H01L25/065; H01L25/18; H01L27/146
Foreign References:
| JP2021158307A | 2021-10-07 | |||
| JP2016027614A | 2016-02-18 |
Attorney, Agent or Firm:
TANAKA Hidetetsu et al. (JP)
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