Title:
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
Document Type and Number:
WIPO Patent Application WO/2011/007469
Kind Code:
A1
Abstract:
Provided is a semiconductor device comprising: a first transistor, which has a gate electrode (104) formed on a semiconductor substrate (101) with a gate insulation film (103) interposed, a first sidewall (108) formed on a side surface of the gate electrode (104), and a source-drain diffusion layer (111); and a second transistor, which has a gate electrode (104) formed on a semiconductor substrate (101) with a gate insulation film (103) interposed, a first sidewall (108) formed on a side surface of the gate electrode (104), and a second sidewall (109) formed on the outside of the first sidewall (108). In a silicide forming region (A), a nickel silicide layer (114) is formed at the top of the gate electrode (104) and at the top of the source-drain diffusion layer (111), and the first sidewall (108) is resistant to the etching materials used when the second sidewall (109) is etched.
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Inventors:
GOTOU SATORU
Application Number:
PCT/JP2010/001098
Publication Date:
January 20, 2011
Filing Date:
February 19, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
GOTOU SATORU
GOTOU SATORU
International Classes:
H01L21/8234; H01L21/28; H01L21/283; H01L21/768; H01L23/522; H01L27/088
Domestic Patent References:
WO2004114390A1 | 2004-12-29 |
Foreign References:
JP2009026955A | 2009-02-05 | |||
JP2005260047A | 2005-09-22 | |||
JP2005150713A | 2005-06-09 | |||
JP2005236105A | 2005-09-02 | |||
JP2007165480A | 2007-06-28 |
Attorney, Agent or Firm:
MAEDA, Hiroshi et al. (JP)
Hiroshi Maeda (JP)
Hiroshi Maeda (JP)
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