Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/240340
Kind Code:
A1
Abstract:
Provided is a semiconductor device for which an increase in the circuit surface-area is suppressed. The semiconductor device includes a first circuit layer and a second circuit layer which is on the first circuit layer. The first circuit layer includes a first transistor, and the second circuit layer includes a second transistor. The gate of the second transistor is electrically connected to one of the source and the drain of the first transistor. The source or the drain of the second transistor is electrically connected to the other of the source and the drain of the first transistor. The semiconductor layer of the second transistor includes a metal oxide.
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Inventors:
YAKUBO YUTO (JP)
KUNITAKE HITOSHI (JP)
IKEDA TAKAYUKI (JP)
KUNITAKE HITOSHI (JP)
IKEDA TAKAYUKI (JP)
Application Number:
PCT/IB2020/054715
Publication Date:
December 03, 2020
Filing Date:
May 19, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L29/786; H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/088
Foreign References:
| JP2009260271A | 2009-11-05 | |||
| JP2014199402A | 2014-10-23 | |||
| US9431441B1 | 2016-08-30 | |||
| US20180152189A1 | 2018-05-31 |
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