Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/156877
Kind Code:
A1
Abstract:
Provided is a semiconductor device that enables miniaturization or high integration. The semiconductor device comprises a first memory cell, a second memory cell on the first memory cell, a first conductor, and a second conductor on the first conductor. Each of the first memory cell and the second memory cell includes a transistor and a capacitive element. One of the source and the drain of the transistor is electrically connected to a lower electrode of the capacitive element. The first conductor has a portion in contact with the other one of the source and the drain of the transistor of the first memory cell, the upper surface of the first conductor has a portion in contact with the lower surface of the second conductor, and the second conductor has a portion in contact with the other one of the source and the drain of the transistor of the second memory cell.
Inventors:
YAMAZAKI SHUNPEI (JP)
ONUKI TATSUYA (JP)
KUNITAKE HITOSHI (JP)
HODO RYOTA (JP)
ONUKI TATSUYA (JP)
KUNITAKE HITOSHI (JP)
HODO RYOTA (JP)
Application Number:
PCT/IB2023/051027
Publication Date:
August 24, 2023
Filing Date:
February 06, 2023
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H10B12/00; H01L21/336; H01L21/8234; H01L27/06; H01L27/088; H01L29/786; H01L29/788; H01L29/792; H10B41/70
Domestic Patent References:
| WO2020234689A1 | 2020-11-26 | |||
| WO2021019334A1 | 2021-02-04 |
Foreign References:
| JP2019029666A | 2019-02-21 | |||
| US20170110192A1 | 2017-04-20 | |||
| JP2016208024A | 2016-12-08 | |||
| JP2015195074A | 2015-11-05 | |||
| JP2015188070A | 2015-10-29 |
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