SEMICONDUCTOR DEVICE

WIPO Patent Application WO/2023/181749

A1

In the present invention, a semiconductor device (100) comprises: a substrate (101); a back barrier layer (103); a channel layer (104) having a smaller bandgap than that of the back barrier layer (103); a first barrier layer (105) having a larger bandgap than that of the channel layer (104); a second barrier layer (106) provided to so as to bury a first recess part (107), the second barrier layer (106) having a bandgap larger than that of the channel layer (104); two-dimensional electron gas (111, 112) generated on the channel layer (104) side of the interface between the channel layer (104) and the first barrier layer (105) or the second barrier layer (106); a source electrode (122) and a drain electrode (123); and a gate electrode (121). The In composition ratio of the first barrier layer (105) is less than the In composition ratio of the second barrier layer (106). The Al composition ratio of the first barrier layer (105) is equal to or greater than the Al composition ratio of the second barrier layer (106).

JP6898222	Compound semiconductor substrate
JP6327564	Semiconductor device
JPH07249757	PRODUCTION OF EPITAXIAL WAFER FOR HEMT

KANDA YUSUKE
SHIMIZU JUN

PCT/JP2023/006048

September 28, 2023

February 20, 2023

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NUVOTON TECH CORPORATION JAPAN (JP)

H01L29/778; H01L21/338; H01L29/812

JP2009076845A	2009-04-09
JP2012510172A	2012-04-26
JP2014072397A	2014-04-21
JP2015536570A	2015-12-21
JP2021510461A	2021-04-22
US20160300835A1	2016-10-13

NII, Hiromori et al. (JP)

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