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Patent Searching and Data


Title:
SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/183937
Kind Code:
A1
Abstract:
Provided is a semiconductor device which can further improve the performance of a semiconductor element having a gate electrode surrounding three surfaces of a plate-shaped channel region. The present invention comprises: a semiconductor layer; a channel region that is provided on the semiconductor layer; first and second main electrode regions that are provided to face both end sides of the channel region in a channel length direction; gate insulation films that are provided on inner walls of first and second trenches provided on both mutually facing sides of the channel region and on the upper surface of the channel region; and a gate electrode that has a first convex part embedded in the first trench with the gate insulation film therebetween, a second convex part embedded in the second trench with the gate insulation film therebetween, and a horizontal part connected to the upper ends of the first and second convex parts and provided on the upper surface of the channel region with the gate insulation film therebetween, wherein the depths of the first and second main electrode regions are equal to or larger than the depths of the first and second convex parts.

Inventors:
KIMIZUKA NAOHIKO (JP)
KATAOKA TOYOTAKA (JP)
KUDOH YOSHIHARU (JP)
Application Number:
PCT/JP2020/002508
Publication Date:
September 17, 2020
Filing Date:
January 24, 2020
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L29/78; H01L21/336; H01L21/8234; H01L27/06; H01L27/088; H01L27/146
Foreign References:
JP2002151688A2002-05-24
JPH1168069A1999-03-09
JP2006121093A2006-05-11
Other References:
See also references of EP 3940791A4
Attorney, Agent or Firm:
TANAKA Hidetetsu et al. (JP)
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