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Title:
SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2011/027525
Kind Code:
A1
Abstract:
Disclosed is a semiconductor element which is provided with: a first silicon carbide layer (2) formed on the surface of a silicon carbide substrate (1); a second silicon carbide layer (6) formed on a region of a part of the surface of the first silicon carbide layer (2); a metal silicide layer (11), which is formed on the first silicon carbide layer (2) and is in contact with the first silicon carbide layer (2); an interlayer insulating film (9), which is provided on the second silicon carbide layer (6) and has an opening (10s); and a conductive layer (12) formed in the opening (10s). The metal silicide layer (11) is provided in contact with the inner wall of the opening (10s), the conductive layer (12) is electrically connected with the first silicon carbide layer (2) with the metal silicide layer (11) therebetween, and the metal silicide layer (11) is in contact with the second silicon carbide layer (6). With such configuration, an excellent contact to the silicon carbide layer is formed, and the area of a chip is reduced.

Inventors:
NIWAYAMA MASAHIKO
UCHIDA MASAO
HASHIMOTO KOICHI
KUDOU CHIAKI
Application Number:
PCT/JP2010/005292
Publication Date:
March 10, 2011
Filing Date:
August 27, 2010
Export Citation:
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Assignee:
PANASONIC CORP (JP)
NIWAYAMA MASAHIKO
UCHIDA MASAO
HASHIMOTO KOICHI
KUDOU CHIAKI
International Classes:
H01L29/78; H01L21/28; H01L21/336; H01L29/12
Domestic Patent References:
WO2009054140A12009-04-30
WO2004008512A12004-01-22
Foreign References:
JP2006066438A2006-03-09
JP2005039257A2005-02-10
Attorney, Agent or Firm:
OKUDA, SEIJI (JP)
Seiji Okuda (JP)
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