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Title:
SEMICONDUCTOR PACKAGE
Document Type and Number:
WIPO Patent Application WO/2021/014731
Kind Code:
A1
Abstract:
In this semiconductor package that forms vias, a decrease in yield is suppressed.　The semiconductor package comprises: a solid-state image sensor; a circuit layer; a wiring layer; and a support substrate. In the semiconductor package, the solid-state image sensor produces image data. A signal processing circuit that performs a predetermined signal process on the image data is disposed on the circuit layer. An output-side via of which the other end is connected to the external terminal penetrates the support substrate. The wiring layer is disposed between the support substrate and the circuit layer, and a signal line connecting a signal processing circuit and one end of the output-side via is wired.

Inventors:
OHIRA HIKARU (JP)
SATO NINAO (JP)
FUJINAGA YOICHIRO (JP)
TSUKADA ATSUSHI (JP)
Application Number:
PCT/JP2020/020224
Publication Date:
January 28, 2021
Filing Date:
May 22, 2020
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H04N5/369
Domestic Patent References:
WO2019021705A12019-01-31
WO2018186027A12018-10-11
WO2017061296A12017-04-13
Foreign References:
JP2019029979A2019-02-21
JPH07204162A1995-08-08
JP2017175004A2017-09-28
JP2007287967A2007-11-01
JP2007299929A2007-11-15
JP2016086091A2016-05-19
JP2008160648A2008-07-10
JP2007042879A2007-02-15
JP2001320036A2001-11-16
JP2000253203A2000-09-14
Other References:
See also references of EP 4006975A4
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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