Title:
SEMICONDUCTOR STRUCTURE AND FORMATION METHOD
Document Type and Number:
WIPO Patent Application WO/2021/185062
Kind Code:
A1
Abstract:
A semiconductor structure and a formation method. The formation method therefor comprises: providing a semiconductor substrate (101), wherein the semiconductor substrate (101) has formed an isolation structure (111), an active region (103) and a buried word line structure (106), and a first dielectric layer (107) is formed on the top part of the buried word line structure (106); determining the position of a bit line contact opening (401) on the top surface of the semiconductor substrate (101) and the top surface of the first dielectric layer (107); according to the position of the bit line contact opening (401), etching the active region (103), first dielectric layer (107) and isolation structure (111) exposed by the bit line contact opening (401) until the active region (103) is etched to a preset depth to form a bit line contact window (105); and forming a second dielectric layer (602) on the surface of the isolation structure (111) and the surface of the first dielectric layer (107) having a depth greater than the surface of the active region (103) in the bit line contact window (105).
Inventors:
WAN WEI (CN)
Application Number:
PCT/CN2021/078515
Publication Date:
September 23, 2021
Filing Date:
March 01, 2021
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/108
Foreign References:
| KR20140078473A | 2014-06-25 | |||
| US9230858B2 | 2016-01-05 | |||
| CN105719998A | 2016-06-29 | |||
| CN108470710A | 2018-08-31 |
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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