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Patent Searching and Data


Title:
SEMICONDUCTOR STRUCTURE MANUFACTURING METHOD, SEMICONDUCTOR STRUCTURE, AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/045733
Kind Code:
A1
Abstract:
A semiconductor structure manufacturing method, a semiconductor structure and a semiconductor device. The method comprises: providing a substrate (1), and separately forming on the substrate (1) a bit line structure (210), a capacitor structure (230), and a transistor structure (220) which extends along a second direction (Y). The bit line structure (210) comprises multiple bit lines (211) stacked along a first direction (Z); the capacitor structure (230) comprises multiple capacitors (231) stacked along a first direction (X); the transistor structure (220) comprises multiple transistors (224) stacked along the first direction (Z). The transistor structure (220) has a first end (221) and a second end (222) in the second direction (Y), the first end (221) being connected to the bit line structure (210), the second end (222) being connected to the capacitor structure (230), and the bit line structure (210) and the capacitor structure (230) being located on two opposite sides of the transistor structure (220) along a third direction (X). The first direction (Z) is perpendicular to the substrate (1), and the second direction (Y) and the third direction (X) are located in a plane parallel to the substrate (1).

Inventors:
ZHAO WENLI (CN)
Application Number:
PCT/CN2023/097869
Publication Date:
March 07, 2024
Filing Date:
June 01, 2023
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/105; G11C11/24
Foreign References:
CN115274565A2022-11-01
CN112397517A2021-02-23
US20210134802A12021-05-06
US20100214823A12010-08-26
CN1507061A2004-06-23
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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