Title:
SEMICONDUCTOR STRUCTURE PREPARATION METHOD AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/066277
Kind Code:
A1
Abstract:
Disclosed are a semiconductor structure preparation method and a semiconductor structure. The method comprises: providing a substrate; forming target bit line pillars on the substrate; forming a first dielectric layer covering the surfaces of the target bit line pillars and the surface of the substrate; forming a solid-state target phase change layer on the side walls of the first dielectric layer, the target phase change layer being used for sublimating and forming target gaps; and forming a second dielectric layer covering the side walls of the target phase change layer; and forming target conductive plugs between adjacent side walls of the second dielectric layer.
Inventors:
HSU CHENG-HUNG (CN)
Application Number:
PCT/CN2023/086070
Publication Date:
April 04, 2024
Filing Date:
April 04, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/768
Foreign References:
| US20150126013A1 | 2015-05-07 | |||
| CN1917158A | 2007-02-21 | |||
| CN109952657A | 2019-06-28 | |||
| CN110277492A | 2019-09-24 | |||
| CN111180463A | 2020-05-19 | |||
| US20140179092A1 | 2014-06-26 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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