Title:
TRENCH CAPACITOR PACKAGING STRUCTURE AND PREPARATION METHOD THEREFOR, AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/066278
Kind Code:
A1
Abstract:
The present disclosure relates to a trench capacitor packaging structure and a preparation method therefor, and a semiconductor structure. The trench capacitor packaging structure comprises a substrate having a trench, a trench capacitor located on one side of the substrate and filled in the trench, and an interposer structure. The trench capacitor comprises a plurality of electrode layers arranged in a stacked manner and a dielectric layer located between any two adjacent electrode layers. Any layer structure between the substrate and a top dielectric layer constitutes a target layer. The top surfaces of the electrode layer and the dielectric layer located on the side of the target layer away from the substrate and the top surface of the target layer are located on the same plane. The top surface of the electrode layer located on the side of the target layer away from the substrate forms a bare electrode. The interposer structure is arranged on the side of the trench capacitor away from the substrate, and is at least correspondingly connected to the bare electrode.
Inventors:
GAO YUANHAO (CN)
WANG CHUNYANG (CN)
CHEN JUN (CN)
WANG CHUNYANG (CN)
CHEN JUN (CN)
Application Number:
PCT/CN2023/086127
Publication Date:
April 04, 2024
Filing Date:
April 04, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L23/64
Foreign References:
| CN113130444A | 2021-07-16 | |||
| CN109103188A | 2018-12-28 | |||
| CN114883491A | 2022-08-09 | |||
| CN113130746A | 2021-07-16 | |||
| CN112510012A | 2021-03-16 | |||
| CN113130449A | 2021-07-16 | |||
| US20070221976A1 | 2007-09-27 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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