Title:
STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/144652
Kind Code:
A1
Abstract:
Provided is a novel memory device. Provided is a memory device in which N (N is an integer of 2 or more) layers of memory layers that each include a plurality of memory cells formed in a matrix are laminated. Along the lamination direction of the memory layers, a write bit line, a read bit line, and a selection line are provided. Along a direction orthogonal to the lamination direction of the memory layers, a write word line and a read word line are provided. The memory cells each have a first transistor, a second transistor, and a capacitive element. The source or drain of the first transistor is electrically connected to the write bit line via a first conductor having a region functioning as a source electrode or a drain electrode. At least one of the upper surface, lateral surface, and lower surface of the first conductor has a region being in contact with the write bit line.
Inventors:
YAMAZAKI SHUNPEI (JP)
ONUKI TATSUYA (JP)
KATO KIYOSHI (JP)
KUNITAKE HITOSHI (JP)
HODO RYOTA (JP)
ONUKI TATSUYA (JP)
KATO KIYOSHI (JP)
KUNITAKE HITOSHI (JP)
HODO RYOTA (JP)
Application Number:
PCT/IB2023/050352
Publication Date:
August 03, 2023
Filing Date:
January 16, 2023
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H10B12/00; H01L21/336; H01L29/788; H01L29/792; H10B41/70
Domestic Patent References:
| WO2020157553A1 | 2020-08-06 |
Foreign References:
| JP2015181159A | 2015-10-15 | |||
| JP2013065638A | 2013-04-11 |
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