Title:
SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER
Document Type and Number:
WIPO Patent Application WO/2023/120050
Kind Code:
A1
Abstract:
A SARADC 100A has redundancy. An analog unit 110 samples an analog input voltage VIN, and generates a comparison signal COMP indicating the magnitude relationship between a threshold value voltage corresponding to a control code DAC and the analog input voltage VIN. A logic unit 130A generates, during an i-th (i≥1) cycle, a first value Ai+1 obtained by adding the weight wi+1 of an (i+1)-th cycle to a control code DACi of the i-th cycle and a second value Bi+1 obtained by subtracting the weight wi+1 of the (i+1)-th cycle from the control code DACi of the i-th cycle. The logic unit 130A supplies, upon establishment of a comparison signal COMPi of the i-th cycle, either the first value Ai+1 or the second value Bi+1 corresponding to the comparison signal COMPi, as a control code DACi+1 of the (i+1)-th cycle to the analog unit 110.
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Inventors:
NAKAMURA HARUAKI (JP)
Application Number:
PCT/JP2022/043798
Publication Date:
June 29, 2023
Filing Date:
November 28, 2022
Export Citation:
Assignee:
ROHM CO LTD (JP)
International Classes:
H03M1/38; H03M1/10; H03M1/46
Foreign References:
| JP2017077020A | 2017-04-20 | |||
| JP2017123531A | 2017-07-13 | |||
| JP2014135603A | 2014-07-24 | |||
| JP2014143639A | 2014-08-07 | |||
| US7250896B1 | 2007-07-31 |
Attorney, Agent or Firm:
MORISHITA Sakaki (JP)
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