Title:
SWITCH, SWITCHING METHOD, AND SWITCHING CONTROL PROGRAM
Document Type and Number:
WIPO Patent Application WO/2006/054704
Kind Code:
A1
Abstract:
A switch comprising a switch section (1-1), input side port mapping blocks (1-4-1 to 1-4-P), output side port mapping blocks (1-5-1 to 1-5-P), and a virtual control section (central control section) (1-0) in which logical division or logical integration into a plurality of switches smaller than a physical switch capacity can be carried out. The switch section has a plurality of first input ports and a plurality of first output ports. The input side port mapping block has a plurality of second input ports and signals inputted to the plurality of second input ports are inputted to the first input ports at the switch section. The output side port mapping block has a plurality of second output ports and signals outputted to the first output ports at the switch section are outputted from the plurality of second output ports.
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Inventors:
HIGUCHI JUNICHI (JP)
YOSHIKAWA TAKASHI (JP)
YANAGIMACHI SHIGEYUKI (JP)
HIDAKA YOUICHI (JP)
YOSHIKAWA TAKASHI (JP)
YANAGIMACHI SHIGEYUKI (JP)
HIDAKA YOUICHI (JP)
Application Number:
PCT/JP2005/021264
Publication Date:
May 26, 2006
Filing Date:
November 18, 2005
Export Citation:
Assignee:
NEC CORP (JP)
HIGUCHI JUNICHI (JP)
YOSHIKAWA TAKASHI (JP)
YANAGIMACHI SHIGEYUKI (JP)
HIDAKA YOUICHI (JP)
HIGUCHI JUNICHI (JP)
YOSHIKAWA TAKASHI (JP)
YANAGIMACHI SHIGEYUKI (JP)
HIDAKA YOUICHI (JP)
International Classes:
H04L45/58; H04Q3/52
Foreign References:
| JPH10511820A | 1998-11-10 |
Other References:
LEE H.Y. ET AL: "A new decomposition algorithm for rearrangeable Clos interconnection networks", IEEE TRANSACTIONS ON COMMUNICATIONS, vol. 44, no. 11, November 1996 (1996-11-01), pages 1572 - 1578, XP000640577
Attorney, Agent or Firm:
Yamashita, Johei (Toranomon 40th MT Bldg. 13-1, Toranomon
5-chome, Minato-k, Tokyo 01, JP)
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