Title:
SYSTEM AND METHOD FOR VIDEO CODING
Document Type and Number:
WIPO Patent Application WO/2020/256085
Kind Code:
A1
Abstract:
An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether a first virtual pipeline decoding unit (VPDU) is split into smaller blocks and whether a second VPDU is split into smaller blocks. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is split into smaller blocks, a block of chroma samples is predicted without using luma samples. In response to a determination the first VPDU is split into smaller blocks and a determination the second VPDU is split into smaller blocks, the block of chroma samples is predicted using luma samples. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is not split into smaller block, the block of chroma samples is predicted using luma samples. The block is encoded using the predicted chroma samples.
Inventors:
KUO CHE-WEI
LI JING YA
LIM CHONG SOON
TEO HAN BOON
SUN HAI WEI
MARS ROHITH
TOMA TADAMASA (JP)
NISHI TAKAHIRO
ABE KIYOFUMI
KATO YUSUKE
LI JING YA
LIM CHONG SOON
TEO HAN BOON
SUN HAI WEI
MARS ROHITH
TOMA TADAMASA (JP)
NISHI TAKAHIRO
ABE KIYOFUMI
KATO YUSUKE
Application Number:
PCT/JP2020/024047
Publication Date:
December 24, 2020
Filing Date:
June 18, 2020
Export Citation:
Assignee:
PANASONIC IP CORP AMERICA (US)
International Classes:
H04N19/11; H04N19/174; H04N19/186; H04N19/436; H04N19/593; H04N19/96
Domestic Patent References:
| WO2019026807A1 | 2019-02-07 | |||
| WO2020098786A1 | 2020-05-22 |
Foreign References:
| US20140003512A1 | 2014-01-02 | |||
| JP2018191036A | 2018-11-29 |
Other References:
CHEN J ET AL: "Algorithm description for Versatile Video Coding and Test Model 4 (VTM 4)", no. JVET-M1002, 19 March 2019 (2019-03-19), XP030203548, Retrieved from the Internet [retrieved on 20190319]
ZHOU (BROADCOM) M ET AL: "JVET AHG report: Implementation studies (AHG16)", no. JVET-M0016, 7 January 2019 (2019-01-07), XP030252661, Retrieved from the Internet [retrieved on 20190107]
ZHAO (TENCENT) L ET AL: "CE3-related: Simplifications for chroma intra coding", no. JVET-K0293, 9 July 2018 (2018-07-09), XP030199138, Retrieved from the Internet [retrieved on 20180709]
Z-Y LIN ET AL: "CE3-related: Constrained partitioning of chroma intra CBs", no. JVET-N0082, 13 March 2019 (2019-03-13), XP030202807, Retrieved from the Internet [retrieved on 20190313]
CHEN (HIKVISION) F ET AL: "CE3-related: Size restriction for CCLM", no. JVET-N0164, 13 March 2019 (2019-03-13), XP030254705, Retrieved from the Internet [retrieved on 20190313]
C-W HSU ET AL: "CE1-related: Constraint for binary and ternary partitions", no. JVET-K0556, 16 July 2018 (2018-07-16), XP030199971, Retrieved from the Internet [retrieved on 20180716]
C-M TSAI ET AL: "CE2-related: Luma-chroma latency reduction for chroma separate tree", no. JVET-O0273, 25 June 2019 (2019-06-25), XP030219023, Retrieved from the Internet [retrieved on 20190625]
C-M TSAI ET AL: "CE2-related: Luma-chroma dependency reduction for chroma separate tree by constraining CCLM usage", no. JVET-O0274, 4 July 2019 (2019-07-04), XP030219039, Retrieved from the Internet [retrieved on 20190704]
C-W KUO (PANASONIC) ET AL: "Non-CE2: CCLM with Chroma Separate Tree", no. JVET-O0129, 6 July 2019 (2019-07-06), XP030218699, Retrieved from the Internet [retrieved on 20190706]
C-W KUO (PANASONIC) ET AL: "Non-CE3: On Constraint of CCLM and CST", no. JVET-P0177, 2 October 2019 (2019-10-02), XP030216527, Retrieved from the Internet [retrieved on 20191002]
ZHOU (BROADCOM) M ET AL: "JVET AHG report: Implementation studies (AHG16)", no. JVET-M0016, 7 January 2019 (2019-01-07), XP030252661, Retrieved from the Internet
ZHAO (TENCENT) L ET AL: "CE3-related: Simplifications for chroma intra coding", no. JVET-K0293, 9 July 2018 (2018-07-09), XP030199138, Retrieved from the Internet
Z-Y LIN ET AL: "CE3-related: Constrained partitioning of chroma intra CBs", no. JVET-N0082, 13 March 2019 (2019-03-13), XP030202807, Retrieved from the Internet
CHEN (HIKVISION) F ET AL: "CE3-related: Size restriction for CCLM", no. JVET-N0164, 13 March 2019 (2019-03-13), XP030254705, Retrieved from the Internet
C-W HSU ET AL: "CE1-related: Constraint for binary and ternary partitions", no. JVET-K0556, 16 July 2018 (2018-07-16), XP030199971, Retrieved from the Internet
C-M TSAI ET AL: "CE2-related: Luma-chroma latency reduction for chroma separate tree", no. JVET-O0273, 25 June 2019 (2019-06-25), XP030219023, Retrieved from the Internet
C-M TSAI ET AL: "CE2-related: Luma-chroma dependency reduction for chroma separate tree by constraining CCLM usage", no. JVET-O0274, 4 July 2019 (2019-07-04), XP030219039, Retrieved from the Internet
C-W KUO (PANASONIC) ET AL: "Non-CE2: CCLM with Chroma Separate Tree", no. JVET-O0129, 6 July 2019 (2019-07-06), XP030218699, Retrieved from the Internet
C-W KUO (PANASONIC) ET AL: "Non-CE3: On Constraint of CCLM and CST", no. JVET-P0177, 2 October 2019 (2019-10-02), XP030216527, Retrieved from the Internet
Attorney, Agent or Firm:
NII, Hiromori et al. (JP)
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