Title:
THREE-LEVEL INVERTER
Document Type and Number:
WIPO Patent Application WO/2015/049743
Kind Code:
A1
Abstract:
A three-level inverter capable of outputting three voltage levels through the operations of semiconductor switches (4, 5, 12, 13) is configured by connecting a series circuit of capacitors (2, 3) and a series circuit of SiC-MOSFETs or other semiconductor switches (4, 5) in parallel to a DC power supply (1), connecting one end of a bidirectional switch comprising IGBTs or other semiconductor switches (12, 13) and SiC-SBDs or other diodes (10, 11) to the series connection point (M point) of the capacitors (2, 3), and connecting the other end of the bidirectional switch to the series connection point of semiconductor switches (4, 5). The three-level inverter is operated so as to at least satisfy one condition from among the condition that the peak value of an AC output voltage Vo is at least 80% of the voltage of the capacitors (2, 3) and the condition that the output power factor is at least 0.8. As a result, conventional and inexpensive elements can be used for a portion of the semiconductor switches, cost can be reduced, and efficiency and compactness can be enhanced.
Inventors:
YAMADA RYUJI (JP)
MARUYAMA KOJI (JP)
TANAKA TAKAAKI (JP)
MARUYAMA KOJI (JP)
TANAKA TAKAAKI (JP)
Application Number:
PCT/JP2013/076859
Publication Date:
April 09, 2015
Filing Date:
October 02, 2013
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD (JP)
International Classes:
H02M7/483
Foreign References:
| JP5339018B1 | 2013-11-13 | |||
| JP2013102674A | 2013-05-23 | |||
| JP2010252450A | 2010-11-04 | |||
| JP2010288415A | 2010-12-24 |
Other References:
See also references of EP 2966768A4
Attorney, Agent or Firm:
MORITA YUICHI (JP)
Morita Yuichi (JP)
Morita Yuichi (JP)
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