Document |
Document Title |
JPS6298831A |
PURPOSE: To eliminate or reduce the leakage of a signal by additionally installing a switch on a parallel signal and separating a high impedance node reading a serial signal and the intersection part of parallel signals by means of said ...
|
JPS6292624A |
PURPOSE: To decrease the quantity of electric wires required for the wiring and to improve the reliability of inputted/outputted data by connecting the main body of a controller and input/output units with a few signal lines in controlli...
|
JPS6292623A |
PURPOSE: To attain cost-down and to save wiring space by connecting a controller main body and an input/output unit with a few signal lines in controlling lots of input and output means so as to reduce the quantity of electric wires for ...
|
JPS6290033A |
PURPOSE: To ensure the set map time of a data by branching the 2nd data path from this side of a delay means in the 1st data path and relaxing the effect of delay means to the 2nd bit data to be transferred via the 2nd data path. CONSTIT...
|
JPS6218109B2 |
|
JPS6286949A |
PURPOSE: To obtain a receiver having a simple constitution that can obtain a receiving completion signal, to eliminate the necessity of a conventional clock counter and to reduce the chip area of an integrated circuit by adding the regis...
|
JPS6217417B2 |
|
JPS6217259B2 |
|
JPS6257442U |
|
JPS6276327A |
PURPOSE: To reduce number of components by inserting an isolator on the way of a data line through which a serial signal is sent so as to use only three isolators even when number of signal lines through which a parallel signal is output...
|
JPS6213760B2 |
|
JPS6242340U |
|
JPS628878B2 |
|
JPS6238075A |
PURPOSE:To reduce remarkably the processing time of a signal by outputting each signal string at a delay means by a delayed quantity and outputting the signal string inputted one after another continuously while converting it. CONSTITUTI...
|
JPS6226671U |
|
JPS6235720A |
PURPOSE: To automate data writing and control by controlling a data selector with the output of a flip-flop and timing pulses obtained by counting a clock and replacing data with serial data, and reading the status of FIFO in the flip-fl...
|
JPS625379B2 |
A shift register circuit for converting a form of a datum with N bits comprises a shift register with a bit capacity of at least N+1 bits. Each bit of the shift register is set so as to become a predetermined logic condition by a setting...
|
JPS622491B2 |
|
JPS6210929A |
PURPOSE: To make the speed of conversion unrestricted by the speed of processing by forming plural light leaking parts at intervals corresponding to the distance advanced by light in the optical path in clock interval time of serial sign...
|
JPS6210934A |
PURPOSE: To convert light data inputted in parallel directly to serial light data without converting to electrical signals by inputting light data to be converted from opposite side to confluent end of plural light paths and outputting l...
|
JPS61296577A |
A data processing system employs a run-length limited code and incorporates an encoder and decoder sharing common circuits, including a data shift register, a code shift register and a write precompensation logic circuit. Data bits are p...
|
JPS61287335A |
PURPOSE: To realize a parity generation circuit at serial data transfer with a simple circuit by using a binary counter so as to count a one level of a serial data to an input circuit thereby forming a parity bit of the serial data. CONS...
|
JPS61275952A |
PURPOSE: To improve the probability of data reception by reporting the validity of output data to an external device through a signal output means to output data to the external device smoothly and facilitating the retry of the external ...
|
JPS61195614U |
|
JPS61187130U |
|
JPS61187131U |
|
JPS61262843A |
PURPOSE: To scale down a circuit constitution and to obtain high reliability by constituting so that serial and parallel signals are edited and stored so as to output them. CONSTITUTION: Maximum and minimum value detection and memory par...
|
JPS61256828A |
PURPOSE: To obtain an asymmetrical serial parallel conversion circuit by providing a means using asymmetrical input/output bit number, a circuit changing over a register circuit, a selector circuit, selectors, registers, and a counter ci...
|
JPS61255120A |
PURPOSE: To obtain a circuit attaining phase adjustment in the unit of a reciprocal of an integer part of a bit length with simple circuit constitution by adopting the constitution that an input data signal is written by a clock pulse ha...
|
JPS61224522A |
PURPOSE: To simplify the circuit counting the number of times of shift and to decrease the number of gates by providing one FF more than the number of shift stages 8 in addition to 8 flip-flops for shift when the number of bits (n)=8 and...
|
JPS61220587A |
A circuit includes shift registers (SR1, SR2, SR3) having different write and read rates under the control of clock pulses of different frequencies so that they form part of a signal compression or signal expansion circuit for encoding f...
|
JPS6142354B2 |
|
JPS6131437Y2 |
|
JPS61193523A |
PURPOSE: To decrease remarkably the number of signal connecting pints by providing two sets of serial/parallel converters loading serially data to the other converter while one converter receives data serially and using a couple of seria...
|
JPS61139030U |
|
JPS61136671U |
|
JPS61189025A |
PURPOSE: To execute easily a detection processing of a code of a specified pattern by outputting forcibly a parallel data being in a serial-parallel converting circuit at the time point, even at the timing by which a specified code detec...
|
JPS6135587B2 |
CPU - I/O BUS INTERFACE FOR A DATA PROCESSING SYSTEM There is disclosed an input/output system, employed within a data processing system that includes a central processing unit (CPU). The CPU includes improved input/output shift register...
|
JPS61179621A |
PURPOSE: To simplify further the circuit constitution of a serial/parallel converting circuit converting a serial data sent continuously in terms of the hardware by providing a register inputting only a part of a bit data and saving it. ...
|
JPS61128841U |
|
JPS61170142A |
PURPOSE: To attain ease of processing of a microcomputer by adopting serial form for transmission/reception of a data to/from the microcomputer so as to minimize the number of interfaces in comparison with that of a parallel form and cou...
|
JPS61164341A |
PURPOSE: To realize easily serial/parallel and parallel/serial conversion of a data having a long bit length in conversion unit by adopting the constitution that the function of a converting section is divided and the substantial convert...
|
JPS61164343A |
PURPOSE: To obtain a multi-function type serial/parallel conversion circuit by providing m-set of nb registers, a BMX circuit and a control circuit controlling the write/read of the n6 registers, BMX circuit and a selector circuit. CONST...
|
JPS61163726A |
PURPOSE: To realize automatic switching for converting a data which has been inputted in parallel, to serial, and outputting as it is a data which has been inputted in serial, by a simple constitution, by providing a serial-parallel conv...
|
JPS61103936U |
|
JPS61144128A |
PURPOSE: To cope with complication due to the increase in bit number and significance of logic of each bit by constituting a serial data decoding circuit with a counter, a RAM, a logical operating means, a rewrite means and an addressabl...
|
JPS61137480A |
PURPOSE: To reduce the scale of IC and to obtain a data converter of low cost by creating a data converter that does not require a multiplexer. CONSTITUTION: When a series parallel conversion number (split phase number) is N (integer), a...
|
JPS6126853B2 |
|
JPS6117181B2 |
PURPOSE:To enable the economy for the device, by making unnecessary for the counter and decoder for the clock pulse.
|
JPS6117040B2 |
|