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JPH06343048A |
PURPOSE: To simplify the constitution of a data communications controller by dividing both transmitting and receiving data tables in response to the data covering an MSB bit through a necessary bit number and referring to each data table...
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JPH06333399A |
PURPOSE: To surely transfer data even when registers are connected in cascade without complicating clock control in a shift register. CONSTITUTION: A master flip-flop(FF) 1 is operated in synchronization with a clock CL. A save FF 2 is o...
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JPH06334537A |
PURPOSE: To instantaneously rearrange a signal into the same data array with a parallel signal before parallel/serial conversion as to the serial/parallel converting circuit with the indeterminacy removing function. CONSTITUTION: This ci...
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JPH0691555B2 |
PURPOSE:To obtain a communication equipment by which a high level of processing can be performed comparatively easily, with simple constitution, by constituting a device with a means to increase or decrease the output of a counter to whi...
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JPH06311197A |
PURPOSE: To solve the problem of stability, cost and power consumption by suppressing circuits operating at every high speed to be minimum by outputting each channel signal to a prescribed channel by letting a transmission side add a syn...
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JPH06311156A |
PURPOSE: To provide a frame synchronizing circuit which can realize a circuit for synchronizing frames with simple and which can shorten frame synchronization establishment time. CONSTITUTION: A frequency-dividing circuit 5 frequency-div...
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JPH06311204A |
PURPOSE: To suitably perform desired data communication at original high communication speed mutually between high-speed data processors even when communication processing is executed by mutually connecting the plural kinds of data proce...
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JPH06303148A |
PURPOSE: To simplify the circuit configuration in a parallel - serial conversion circuit and to reduce cost by reduction in the number of components and in a chip-occupied area. CONSTITUTION: Parallel data D0-D7 are inputted to a latch c...
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JPH0684983B2 |
PURPOSE:To obtain a converting circuit which is usable even when a LSI is increased in speed by compressing the conversion output obtained by converting a logic signal of an integer (n) larger than 2 into (n-1)-bit parallel data into pre...
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JPH06296140A |
PURPOSE: To obtain a stable output signal without using a delay element adjusting a timing between a data signal and a clock signal. CONSTITUTION: The converter is provided with a 1st latch 2 latching a data signal entering a data termin...
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JPH0682326B2 |
A scan path composed of a plurality of scan registers comprises a first test mode for testing a RAM, a second test mode for testing a logic circuit and a normal mode. In the first test mode, expected value data is set in each of latch ci...
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JPH06290280A |
PURPOSE: To obtain both a parallel-serial converting function and a serial- parallel converting function by using one IC. CONSTITUTION: Parallel-serial conversion switching parts 50 and 55 are interposed between the input side of a shift...
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JPH06291681A |
PURPOSE: To output effective conversion data from a P/S converter even if the timing where S/P-converted data are latched conflicts with the timing where data,whose bit rate is converted are latched by a P/S converter. CONSTITUTION: A wi...
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JPH0681057B2 |
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JPH0666140U |
[Purpose] Eliminates glitches that occur when converting a digital signal format from parallel data to serial data. [Constitution] In a shift register of the parallel serial conversion method in which multiple registers are connected, th...
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JPH0633718Y2 |
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JPH0666693B2 |
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JPH0664565B2 |
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JPH06230084A |
PURPOSE: To cope even with different bit lenghts by reading bit lenght data from the second storage part by an address indicating part, dividing parallel data from the corresponding first storage part into bit lengths, and giving an addr...
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JPH06224781A |
PURPOSE: To prevent the occurrence of data losses due to mistiming by providing a phase analyzing means which analyzes the phase of input data words of parallel bits in addition to a time base which sets two clock signals having opposite...
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JPH06224972A |
PURPOSE: To receive data with a clock pulse having a comparatively low frequency and to convert the received data into parallel data. CONSTITUTION: A clock generating circuit 10 generates a clock signal whose frequency is twice the seria...
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JPH06208634A |
PURPOSE: To easily define an input/output terminal without loading any burden to a software at the semiconductor integrated circuit device. CONSTITUTION: A first shift register circuit part 1 inputs a serial data input SI. A latch circui...
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JPH06205391A |
PURPOSE: To attain high speed processing without increasing the circuit scale by executing plural stages of addition and subtraction for serial arithmetic operation in a data transformation arithmetic operation circuit by means of the sa...
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JPH06205222A |
PURPOSE: To vary the accuracy of an arithmetic operation and processing time for picture coding as necessary. CONSTITUTION: A picture coder is provided with a frame memory 31 storing picture data, an orthogonal transformation section 32 ...
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JPH06204885A |
PURPOSE: To provide a data compression/expansion device capable of compressing data at a high speed with a small circuit scale. CONSTITUTION: This data compression expansion device is constituted of serial circuits in a form for which a ...
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JPH06205392A |
PURPOSE: To eliminate a critical path by providing a delay element to the critical path part of a data arithmetic operation means so as to latch data. CONSTITUTION: A data conversion arithmetic operation device 50 receiving data from a d...
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JPH0654334U |
[Purpose] The software can be reduced by eliminating the need to control the transmission and reception of data for each word and handling it as a series of data sequences. [Constitution] A transmission / reception management means 1 tha...
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JPH06204887A |
PURPOSE: To compress and expand data at a high speed with a small circuit scale. CONSTITUTION: This device is constituted of a serial circuit provided with a redundant part not used at the time of compassion but used at the time of expan...
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JPH06204886A |
PURPOSE: To provide a data compression/expansion device capable of compressing and expanding data at a high speed with a small circuit scale. CONSTITUTION: This data compression/expansion device is constituted of a parallel/serial conver...
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JPH0654875B2 |
A parallel-to-serial converter for synchronously converting parallel data transferred by one or more parallel data channels into corresponding serial data streams having respectively programmable frequency ratios of the serial output dat...
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JPH0648243U |
[Purpose] The purpose is to easily initialize the latch circuit without receiving the initialization signal from the microcomputer. [Constitution] The configuration is such that the latch signal when the clock signal is at the "H" level ...
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JPH06177722A |
PURPOSE: To obtain the broad range delay generating circuit in which power consumption is reduced low with high reliability and a wide control range of a delay time. CONSTITUTION: A serial signal synchronously with a master clock MC is c...
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JPH0648783B2 |
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JPH06169260A |
PURPOSE: To ensure a sufficient setup time even against high speed data and to surely execute serial-parallel conversion by allowing the serial parallel conversion circuit to latch data of an FF of a parallel circuit at a leading time of...
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JPH06133109A |
PURPOSE: To make the reader small and to reduce the manufacture cost by converting a parallel color signal into a serial color signal and processing the converted signal so as to reduce the circuit scale and the size of a printed circuit...
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JPH06131310A |
PURPOSE: To make the arithmetic of longitudinal image data possible when the number of data is less than the number of processor elements. CONSTITUTION: For example, a pointer generation circuit 24 in a shift register for input can store...
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JPH0636532B2 |
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JPH06120842A |
PURPOSE: To decrease the number of circuit element and to reduce the circuit scale of a serial/parallel conversion circuit. CONSTITUTION: The n-stage shift registers 23 and 24 successively shift the input signals by a master clock. The s...
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JPH06112844A |
PURPOSE: To suppress the operating speed of the conversion circuit to a signal speed or below after the speed conversion by multiplexing a signal subject to serial parallel conversion at once and applying speed conversion to the multiple...
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JPH06112843A |
PURPOSE: To simplify the circuit configuration of the byte demultiplex system. CONSTITUTION: Input data D1 are shifted by a prescribed bit number at a 1st serial/parallel conversion means 1 and the result is outputted as 1st intermediate...
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JPH0696017A |
PURPOSE: To decrease the number of wirings required to transfer parallel signals among respective packages in a device and to easily change the wirings. CONSTITUTION: In synchronism with a synchronous signal 5 and a clock signal 6 in the...
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JPH0683786A |
PURPOSE: To execute operation for transferring data to near-by memories in a short time. CONSTITUTION: A parallel processor consisting of an input shift register 1, input side memories 21 to 2M, selectors SELa1 to SELaM, arithmetic circu...
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JPH0685762A |
PURPOSE: To send data for A/D.D/A conversion with high reliability by taking a majority decision logic even on the occurrence of a bit error on a transmission line. CONSTITUTION: The system is provided with a data transmitter 1 comprisin...
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JPH0686251A |
PURPOSE: To obtain a variable length encoder in which the capacity of a transmission buffer can be made small, and the necessary capacity of the transmission buffer can easily be set. CONSTITUTION: Fixed length data 3 outputted from a va...
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JPH0683787A |
PURPOSE: To make it possible to compute image data arrayed in the vertical direction by successively turning on switches at an interval of two switches by means of a switch control circuit in a shift register and arranging the positions ...
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JPH0677949A |
PURPOSE: To provide a data converting system contributed for accelerating data transmission. CONSTITUTION: A PLL circuit 2 extracts the AC signal of a cycle twice as large as serial data Dsn and based on this AC signal, a reference clock...
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JPH0677792A |
PURPOSE: To provide the multiplexer circuit of a low power consumption for suppressing the degradation in waveform of a signal and for reducing the number of multiplexers to require the sharpness of a control signal, which is suitable to...
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JPH0661773A |
PURPOSE: To provide a device/method which generates a digitally self-corrected timing delay element by detecting the delay change of the delay element having the controlled delay and controlling the delay against the environmental change...
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JPH0659968A |
PURPOSE: To attain rapid conversion processing by a simple constitution in respect to a bit/byte conversion circuit for executing mutual conversion between respective bits having individual meaning and a byte including these bits. CONSTI...
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JPH0645951A |
PURPOSE: To obtain an inexpensive serial/parallel data conversion circuit device without generating pulse signal abnormality even when a large capacity load is connected. CONSTITUTION: An inverted serial data pulse signal 21a obtained by...
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