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Title:
半導体装置及びその製造方法、並びに半導体装置の管理システム
Document Type and Number:
Japanese Patent JP5657499
Kind Code:
B2
Abstract:
After stacking m wafers in each of which a plurality of semiconductor chips are formed, the m wafers are diced to semiconductor chips to form a first chip stack having m of the semiconductor chips stacked, and, after stacking n wafers, the n wafers are diced to semiconductor chips to form a second chip stack having n of the semiconductor chips stacked. Next, the first chip stack is sorted according to the number of defective semiconductor chips included in the first chip stack, and the second chip stack is sorted according to the number of defective semiconductor chips included in the second chip stack. Furthermore, the first chip stack or the second chip stack after sorting are combined to form a third chip stack.

Inventors:
東 和幸
杉崎 吉昭
Application Number:
JP2011217929A
Publication Date:
January 21, 2015
Filing Date:
September 30, 2011
Export Citation:
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Assignee:
株式会社東芝
International Classes:
H01L25/065; H01L25/07; H01L25/18
Attorney, Agent or Firm:
きさらぎ international patent business corporation