PURPOSE: To detect the instruction fetch of an instruction group of a memory area in an optional range by controlling the interruption by an interruption request when an instruction executing address is included in an area decided by the given head and end addresses.

CONSTITUTION: The value of a program counter 1 is supplied to a collation circuit 9 together with the values of the head and end address registers 2 and 3. The circuit 9 outputs 1 when the value of the counter 1 is larger than the contents of the register 2. While the circuit 9 delivers 1 to a signal line 7a when the value of the register 1 is smaller than the contents of the register 3. An AND circuit 8 obtains the AND of the signals on both lines 6a and 7a and outputs the result of said AND to a signal line 9a. An interruption control circuit 5 supplies the value of an interruption request validity flag 4 from a signal line 4a and outputs an interruption signal to a signal line 5a only in a valid mode when an interruption request is supplied from a signal line 9a.