PURPOSE: To obtain an analog arithmetic circuit, for which the required area of a chip is small, by providing a unit gain amplifier, forming the analog arithmetic circuit by the small number of high-speed elements and executing analog signal processing at high speed.

CONSTITUTION: In the analog arithmetic circuit formed by a unit gain amplifier 1, capacitors 2 and 3, switches 4-7 and power sources 8 and 9, the switches 4-7 are changed over the required arithmetic is executed. For example, when the switches 4 and 5 are closed and the switch 7 is opened, weighted subtraction is executed to the voltages of the power sources 8 and 9. When the switch 5 is opened and the switches 4 and 7 are closed, the analog arithmetic amplifier goes to be a non-inverted amplifier having gain. The unit gain amplifier 1, which can be formed by the small number of the high speed elements, to be faster than an operational amplifier is constituted by coupling the switches 4-7 and capacitors 2 and 3. Thus, the analog signal processing can be executed at high speed and a required chip circuit can be made small.