PURPOSE: To increase packaging density by providing an interpolative IGFET protruding from the substrate having IGFET.

CONSTITUTION: Two p-layers 38 formed on the n-type substrate and an n-layer 39 is formed on one of the p-layer 38. p-layer 40 and n-layer 41 are epitaxially formed on the substrate 37. Using patterning by glass mask, etc., a part of the layers 40, 41 is oxidized to form insulater films 42 to isolate element area. Then, patterning and anisotropic etching, etc. are used to form the part 51 of vertical type FET. Next, gate oxide film 43 and polycrystalline silicon gate electrode 44 are formed. These are covered with insulator film 45 and partly opened to provide electrode. This provides an interpolation type FET of signal gate three-dimensional structure which contributes to effective utilization of the substrate because of one side vertical formation, and occupies only a small area because no separating layer is needed and a common gate can be used.