Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2009021464
Kind Code:
A
Abstract:
To provide a semiconductor device capable of preventing disconnection.
In a PMOS transistor, a p-type active region 122 is formed so as to be overlapped on the partial region of an n-type active region 121 in the width direction of a line. Therefore, the generation of a low concentration region can be prevented in the vicinity of an interface between the n-type active region 121 and the p-type active region 122 even if the region 121 and the region 122 are mixed so as to be mutually contacted (butting diffusion).
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Inventors:
KONO YUICHI
Application Number:
JP2007183941A
Publication Date:
January 29, 2009
Filing Date:
July 13, 2007
Export Citation:
Assignee:
RENESAS TECH CORP
International Classes:
H01L21/28; H01L21/336; H01L21/8238; H01L27/092; H01L29/78
Domestic Patent References:
| JPH0923006A | 1997-01-21 | |||
| JPH11289018A | 1999-10-19 | |||
| JP2002076138A | 2002-03-15 | |||
| JP2006344708A | 2006-12-21 |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita