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Title:
多層配線基板
Document Type and Number:
Japanese Patent JP5504149
Kind Code:
B2
Abstract:
A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

Inventors:
Maeda Shinosuke
Tetsuo Suzuki
Atsuhiko Sugimoto
Tatsuya Ito
Takuya Hanto
Hirano Kun
Application Number:
JP2010285410A
Publication Date:
May 28, 2014
Filing Date:
December 22, 2010
Export Citation:
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Assignee:
Nippon Special Ceramics Co., Ltd.
International Classes:
H01L23/12; H05K1/02; H05K3/34; H05K3/46
Domestic Patent References:
JP2007173775A
JP2008251702A
JP2007158174A
JP2008300507A
JP2007173622A
JP2005302922A
JP2010067887A
Attorney, Agent or Firm:
Hisahiko Atsumi



 
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