SEMICONDUCTOR DEVICE

Japanese Patent JP2007180569

A

To provide a semiconductor device in which occurrence of crystal defects in the substrate is prevented by reducing the influence of the temperature difference between an SOI region or SON (Silicon-On-Nothing) region and silicon regions on the substrate caused by the heat absorption efficiency difference therebetween even if the substrate is rapidly heated and rapidly cooled.

A silicon region 23B is formed on the semiconductor substrate, and surrounding the silicon region 23B, an SOI region 22 is formed on the semiconductor substrate via either an insulating film or an empty cavity. Furthermore, a silicon region 23A is formed surrounding the SOI region 22 on the semiconductor substrate.

WO/2014/067463	THIN FILM TRANSISTOR AND MANUFACTURING METHOD, ARRAY SUBSTRATE, DISPLAY DEVICE AND BARRIER LAYER THEREOF
WO/2018/054111	ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING SAME
JPH01253715	MANUFACTURE OF THIN FILM TRANSISTOR

SATO TSUTOMU
NAGANO HAJIME
MIZUSHIMA ICHIRO
YAMADA TAKASHI
UDO SUKEMUNE
NITTA SHINICHI

JP2007032512A

July 12, 2007

February 13, 2007

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TOSHIBA CORP

H01L27/12; H01L21/205; H01L21/76; H01L21/762; H01L21/764; H01L21/8234; H01L27/08; H01L27/088; H01L27/10

JP2000243944A	2000-09-08
JP2001274236A	2001-10-05
JPH09223730A	1997-08-26
JPH0817694A	1996-01-19
JPH05129424A	1993-05-25
JPH06302791A	1994-10-28
JPS6358817A	1988-03-14
JPS6412543A	1989-01-17
JPH10173042A	1998-06-26
JPH11176711A	1999-07-02
JPH1117001A	1999-01-22

Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Takashi Mine
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto

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