Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2021189870
Kind Code:
A
Abstract:
To provide a semiconductor device capable of suppressing degradation of performance due to lower clock frequency.SOLUTION: The semiconductor device includes multiple processor cores each operating with a common power supply. Each of the multiple processor cores has a clock control circuit that is configured so as to, when detecting a voltage drop of power supply to the own processor core, decrease the own clock frequency used by the own processor core, and adjust the speed to raise the own clock frequency depending on the power supply voltage status or clock frequency status of the other processor core of the multiple processor cores.SELECTED DRAWING: Figure 9
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Inventors:
NISHIYAMA RYUICHI
Application Number:
JP2020095892A
Publication Date:
December 13, 2021
Filing Date:
June 02, 2020
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G06F15/78; G06F1/04; G06F1/28
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Tadahiko Ito