PURPOSE: To reduce the power loss required for driving of an FET, by applying the 1st pulse between a gate and a source of the FET for turning-on and turning off the FET through the application of the 2nd pulse to a stray capacitance discharge circuit of the FET.

CONSTITUTION: In applying a pulse signal "1" to a terminal 1, an FETQ3 is turned on for a prescribed period with an inverter I1, a capacitor C2 and a wave shape circuit I2 and the 1st pulse signal "1" is generated at a diode D1. In this case, the 2nd pulse signal, i.e., an input pulse signal to a diode D2 is "0" and an FETQ2 is turned off. Thus, a stray capacitance C1 is charged and an FETQ1 is turned on. Next, when the pulse signal at the terminal 1 goes to "0", the 2nd pulse signal is generated at the diode D2 to turn on the FETQ2. Thus, charges charged in the stray capacitance C1 are discharged to turn off the FETQ1.