Title:
RESISTOR-EMBEDDED SUBSTRATE AND CURRENT DETECTION MODULE PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2012/073400
Kind Code:
A1
Abstract:
A technique capable of reducing variations in the resistance value of an embedded resistor element is provided. In a sense resistor (3) embedded in a resistor-embedded substrate (2) having a plurality of layered insulator layers, resistor layers (4) provided on the surfaces of three of the insulator layers are formed connected in parallel, and it therefore becomes possible to reduce variations in the resistance value of the sense resistor (3), in which the resistor layers (4) are formed connected in parallel, even when there are variations in the magnitude of the resistance values of each of the resistor layers (4) due to blurring or thickness variations in printing caused by resistor paste.
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Inventors:
IWANAGA MINORU (JP)
MATSUBARA HIROSHI (JP)
MATSUBARA HIROSHI (JP)
Application Number:
PCT/JP2011/004051
Publication Date:
June 07, 2012
Filing Date:
July 15, 2011
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
IWANAGA MINORU (JP)
MATSUBARA HIROSHI (JP)
IWANAGA MINORU (JP)
MATSUBARA HIROSHI (JP)
International Classes:
H05K3/46; H01L23/12; H05K1/16
Foreign References:
| JPH06169176A | 1994-06-14 | |||
| JP2005223223A | 2005-08-18 | |||
| JP2004047949A | 2004-02-12 | |||
| JP2009158742A | 2009-07-16 | |||
| JP2004047574A | 2004-02-12 |
Attorney, Agent or Firm:
YANASE, Yuji et al. (JP)
Yuji Yanase (JP)
Yuji Yanase (JP)
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Claims: