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Patent Searching and Data


Title:
SEMICONDUCTOR STRUCTURE MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2022/205659
Kind Code:
A1
Abstract:
The present application relates to the technical field of semiconductor manufacturing, and provides a semiconductor structure manufacturing method and a semiconductor structure, for solving the technical problems of low semiconductor structure stability and low performance of a semiconductor device. The method comprises: providing a substrate provided with a plurality of active areas arranged at intervals; sequentially forming a first laminated structure and a first photoresist layer on the substrate; performing negative development on the first photoresist layer to form a first pattern; etching the first laminated structure along the first pattern, and forming a second pattern in the first laminated structure; and taking the first laminated structure having the second pattern as a mask, etching the substrate to a preset depth to form a recess, and forming a plurality of bosses arranged at intervals on the reserved substrate, the recess surrounding the bosses, and the active areas being exposed between the bosses. The first photoresist layer is subjected to one-time negative development, and the first laminated structure is subjected to one-time etching, such that the alignment problem of two-time development and etching is avoided, the bridging possibility between the bosses is reduced, and the stability of the semiconductor structure and the performance of the semiconductor device are improved.

Inventors:
YU YEXIAO (CN)
LIU ZHONGMING (CN)
Application Number:
PCT/CN2021/104782
Publication Date:
October 06, 2022
Filing Date:
July 06, 2021
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/108; H01L21/8242
Foreign References:
US20140154882A12014-06-05
US20160035731A12016-02-04
CN109003938A2018-12-14
CN112530946A2021-03-19
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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