【発明の名称】半導体装置の製造方法

Title:

【発明の名称】半導体装置の製造方法

Document Type and Number:

Japanese Patent JP2875139

Kind Code:

B2

Abstract:

Outer leads are buried in a package. At least the contact portions of the outer leads which are connected to a circuit board are exposed from the package and the exposed portions make the same flat surfaces as the package surface. When forming the package, the outer leads are used as the side wall of a mold forming mold, and therefore, they are formed thicker than inner leads inside the package. Thus, the package thickness can be made equal to the thickness of the outer leads.

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Inventors:

ASADA JUNICHI
HORI MASAHIKO
TAKEI SHINJI

Application Number:

JP19793893A

Publication Date:

March 24, 1999

Filing Date:

July 15, 1993

Export Citation:

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Assignee:

TOSHIBA KK

International Classes:

H01L21/56; H01L23/28; H01L23/31; H01L23/495; H01L23/50; (IPC1-7): H01L23/50; H01L21/56; H01L23/28

Domestic Patent References:

JP6489353A
JP3283644A
JP4211152A
JP2742U

Attorney, Agent or Firm:

Toshi Takemura

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