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Title:
試験装置、試験方法、解析装置及びプログラム
Document Type and Number:
Japanese Patent JP4439009
Kind Code:
B2
Abstract:
There is provided a test apparatus including a plurality of test signal feeding sections that are provided in a one-to-one correspondence with the plurality of memories under test, where each of the plurality of test signal feeding sections feeds a test signal designed to test a corresponding one of the plurality of memories under test to the corresponding memory under test, a plurality of defect detecting sections that are provided in a one-to-one correspondence with the plurality of memories under test, where each of the plurality of defect detecting sections detects a defect in a corresponding one of the plurality of memories under test, a plurality of first calculating sections that are provided in a one-to-one correspondence with the plurality of memories under test, where each of the plurality of first calculating sections calculates a remedy solution for a corresponding one of the plurality of memories under test and the remedy solution remedies the defect in the corresponding memory under test by replacing a defective storage cell in the corresponding memory under test with a backup cell of the corresponding memory under test, and a second calculating section that takes over, from one or more of the plurality of first calculating sections which have not finished calculating the remedy solutions, the unfinished remedy solution calculations, in response to a start of calculations by the plurality of first calculating sections for remedy solutions for a different group of memories under test, and performs the remedy solution calculations.

Inventors:
River Saki Kunihiko
Application Number:
JP2005268728A
Publication Date:
March 24, 2010
Filing Date:
September 15, 2005
Export Citation:
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Assignee:
Advantest Corporation
International Classes:
G11C29/56; G01R31/28
Domestic Patent References:
JP2000091388A
Foreign References:
WO2002033708A1
Attorney, Agent or Firm:
Akihiro Ryuka